RISC V: The Open Standard Architecture
RISC-V is an open-standard (or open-source, depending on who you ask) instruction set architecture (ISA) for CPUs that was first established in 2014, maintained by RISC-V International. The basic premise for RISC-V is that any company can take the ISA and make their own CPUs, bypassing the closed ecosystems of Arm, AMD, and Intel. Since its debut, RISC-V has grown extremely quickly, with 16 billion cores sold forecasted by 2030.
Latest about RISC V

By Bruno Ferreira Published
Russian semiconductor players shows off bespoke CPU and SoC designs — Arm and Elbrus architectures on display

By Anton Shilov Published
The return of AMD's ambidextrous strategy?

By Bruno Ferreira Published
Well-known engineer Matthias Balwierz (aka Bitluni) designed and created an 8,192-core RISC-V GPU at home.

By Bruno Ferreira Published
Tenstorrent downgrades existing and new Blackhole p150 cards from 140 to 120 tensor cores

By Jon Martindale Published
Premium Alibaba fancies itself a player in the Chinese AI accelerator space

By Anton Shilov Published
Premium GlobalFoundries acquires more CPU IP as it is reshaping its role in the semiconductor supply chain and becomes an IP and manufacturing partner rather than just a chipmaker.

By Bruno Ferreira Published
The Milk-V Titan motherboard includes the UR-DP1000 processor, and it's ready to use with Ubuntu out of the box.

By Luke James Published
The chipmaker is bringing high-performance RISC-V CPU expertise in-house as it balances Arm, Oryon, and future AI-era compute demands.

By Luke James Published
A Slovenian security researcher published an analysis of Sipeed’s NanoKVM in Feburary that raises far-reaching concerns about the €30-€60 remote management device.
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