China's LineShine supercomputer dethrones US' El Capitan, secures first place in Top 500 list — first machine in the rankings to sustain more than 2 ExaFLOPS of double-precision performance using only CPUs

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China's LineShine supercomputer has dethroned El Capitan as the world's number one supercomputer, going straight to the top of the charts after the National Supercomputer Center in Shenzhen (NSCS) submitted its results.

LineShine hit 2.198 FP64 ExaFLOPS in the Linpack benchmark and became the industry's first machine in the Top 500 list to sustain more than 2 ExaFLOPS of double-precision performance using only CPUs. The system is deployed at the National Supercomputing Centre in Shenzhen and was built by the Shenzhen Cloud Computing Center using semi-custom 304-core LX2 processors based on the Armv9 instruction set architecture and running at 1.55 GHz. The machine employs 13.79 million cores in total, uses proprietary LingQi interconnect, and consumes 42.2 MW of power.

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Anton Shilov
Contributing Writer

Anton Shilov is a contributing writer at Tom’s Hardware. Over the past couple of decades, he has covered everything from CPUs and GPUs to supercomputers and from modern process technologies and latest fab tools to high-tech industry trends.

  • usertests
    Is this using TSMC nodes? The GFLOPS/W is comparable to others with the Green500 #1 being 41% more efficient, while El Capitan is only at 17%.

    Top500 website is broken as usual with nonfunctional links to Green500 lists.
    Reply
  • TechieTwo
    ...and I have some ocean front property in Arkansas that you'all be interested in buying. ;)
    Reply
  • bit_user
    The article said:
    Each LX2 CPU relies on two compute chiplets and has a total of 304 CPU cores organized into eight CPU clusters containing 38 cores each. ... The chip features a rather unusual memory architecture that pairs 32 GB of on-package HBM, offering up to 4 TB/s of bandwidth with as much as 256 GB of external DDR5
    So, the whitepaper they previously published goes into quite some detail about its memory subsystem, which is highly NUMA. In fact, to such an extent that they optimized their code on it by running separate MPI nodes on each of those 38-core clusters, since each cluster has a local HBM stack and relatively poor inter-cluster and inter-die bandwidth.

    Also, the dependence on that relatively small amount of HBM to scale performance makes it fairly unsuitable for general-purpose workloads, even though it can theoretically handle them.

    The article said:
    In any case, the very fact that a Chinese supercomputer has achieved extraordinary FP64 performance is remarkable.
    Not their first. See: https://en.wikipedia.org/wiki/Sunway_TaihuLight
    IMO, the remarkable thing is its efficiency (if accurate). I think scaling up ExaFLOPS is not that hard, if your pockets are deep enough, but efficiency would be a better signifier of sophistication and advancement. However, even that can be swung by $$$, since you can easily boost perf/W by simply running more nodes at lower clock speeds. Due to the relative cost of energy vs. silicon, most HPC operators prefer to run their chips towards the upper end of the power envelope, which hurts them on efficiency metrics.
    Reply
  • trica
    I'll believe the results when they've been verified in-person by a team of 100% non-Chinese examiners. I'm even less likely to believe anything coming from the CCP than I am the manipulated information distributed by the US government, and that's really saying something.
    Reply
  • nookoool
    usertests said:
    Is this using TSMC nodes? The GFLOPS/W is comparable to others with the Green500 #1 being 41% more efficient, while El Capitan is only at 17%.

    Top500 website is broken as usual with nonfunctional links to Green500 lists.

    In other articles, it is mention to be Huawei chips.
    Reply
  • usertests
    nookoool said:
    In other articles, it is mention to be Huawei chips.
    It seems like they did a good job on making the supercomputer efficient, especially if they were limited to some SMIC DUV-based 5nm node.
    Reply