PHIZENIX

AI is moving from experimentation to execution. Our team was on the ground at Glean GO 2026 in San Francisco, and the takeaway was clear: the model isn't the differentiator anymore, context is. Swipe through to see our key takeaways from the event, and read the full breakdown on our blog at https://lnkd.in/etYGKiPm

AI is moving from experimentation to execution—and Glean GO 2026 made that shift clear. As a proud Glean partner and sponsor, PHIZENIX was excited to be part of the conversation in San Francisco and connect with leaders shaping the future of enterprise AI. The next phase of AI isn’t just about smarter models. It’s about context, action, and people, connecting enterprise knowledge, systems, and talent to help organizations get more done. At Phizenix, we believe the future lies at the intersection of talent, technology, and business transformation. The Glean ecosystem is bringing that future to life. Thank you to the Glean team and everyone who stopped by the Phizenix booth. We’re excited for what’s ahead. #GleanGO #Glean #EnterpriseAI #AI #AIAgents #FutureOfWork #PHIZENIX

We’re Hiring! 🚨 Role: Digital Design Lead Santa Clara, CA Our client is looking for an experienced Digital Design Lead to drive RTL design and verification for next-generation semiconductor products. In this role, you'll lead the digital design effort across high-speed interface and memory subsystem IPs, taking designs from micro-architecture through tape-out. You'll partner with architecture, verification, DFT, and physical design teams to develop and deliver silicon-ready solutions. The ideal candidate brings strong experience in complex digital ASIC/SoC design, along with hands-on expertise in RTL development, timing closure, low-power design, and technical leadership. Experience with Ethernet and/or PCIe controller or PHY design, DDR, HBM, or LPDDR memory subsystems, and Forward Error Correction (FEC) for high-speed serial links is highly valued. Learn more and apply today https://lnkd.in/eszf23bu Powered by Phizenix – WBENC & Minority-Certified

Hello from Glean:GO! 🚀 Our team is in San Francisco and ready to connect. If you’re here, come find us and say hi!

In case you missed it, we're still hiring! 🚨 Role: Senior Analog & Mixed-Signal IC Designer Santa Clara, CA / Irvine, CA Our client is looking for a Senior Analog & Mixed-Signal IC Designer to help develop next-generation silicon for data communications, wireless, and compute applications. In this role, you'll design and verify high-speed analog and mixed-signal circuits, taking concepts from architecture and simulation through tape-out and silicon bring-up. You'll partner with digital, CAD, and systems teams to design and implement high-performance solutions across wireline SerDes, optical interconnects, data converters, and clocking systems. The ideal candidate brings deep expertise in analog and mixed-signal IC design, along with hands-on experience in advanced FinFET or SOI technologies. Experience with high-speed ADCs/DACs, PLLs, laser/modulator drivers, TIAs, RFIC design, and high-speed SerDes architectures is highly valued. Learn more and apply today https://lnkd.in/ejWYNhtZ Powered by Phizenix – WBENC & Minority-Certified

Every resume on your desk was probably written by AI. Same structure, same buzzwords, less signal than ever. The fix isn't filtering harder, it's grading differently. Swipe through for how to hire past the polish, then read the full blog on our website: https://lnkd.in/eRxEb7t5 #Hiring #TalentAcquisition #FutureOfWork

Looking forward to sponsoring Glean:GO 2026! At a moment when AI is quickly becoming the operating system of the enterprise, this is the event bringing together builders, leaders, and teams using AI in the real world — sharing real architectures, real results, and what’s actually working. Join us: https://lnkd.in/ehc8K_tR #GleanGO Glean

🚨 We’re Hiring! Role: Senior Principal Engineer, Hardware Application Engineering — Signal Integrity & Power Integrity 📍 Santa Clara, CA Our client is looking for a Senior Principal Engineer, Hardware Application Engineering to lead Signal Integrity (SI) and Power Integrity (PI) strategy for next-generation AI networking platforms. In this role, you'll drive SI/PI design, simulation, validation, and customer enablement across high-speed Ethernet and AI fabric solutions, ensuring production-ready hardware from concept through deployment. You'll partner with silicon, board, packaging, and customer engineering teams to perform SI/PI analysis, lead compliance testing, develop reference designs, and guide customers through board bring-up and optimization. The ideal candidate brings deep expertise in high-speed SerDes, SI/PI simulation, power delivery networks, and hands-on lab validation, along with extensive experience supporting customer-facing hardware deployments. Experience with 112G/224G PAM4 SerDes, Ethernet switch platforms, AI infrastructure, Ansys HFSS, Cadence Sigrity, and high-speed lab instrumentation is highly valued. Learn more and apply today https://lnkd.in/e5nA4XYn Powered by Phizenix – WBENC & Minority-Certified

🚨 We’re Hiring! Role: Senior Principal Engineer, Hardware Application Engineering — Board & System Design 📍 Santa Clara, CA Our client is looking for a Senior Principal Engineer, Hardware Application Engineering to lead the design and validation of high-speed networking and AI hardware platforms. In this role, you'll own the complete board design lifecycle, from architecture and schematic design to board bring-up, validation, and customer deployment, helping deliver next-generation compute and networking solutions. You'll partner with silicon, firmware, systems, and customer engineering teams to optimize platform performance, lead hardware design reviews, support high-speed SI/PI analysis, and develop hardware reference designs for production environments. The ideal candidate brings extensive experience designing high-speed boards and systems, deep expertise in SerDes, Ethernet, PCIe, DDR, SI/PI, and PCB design, along with a proven track record supporting customer-facing hardware deployments. Experience with AI networking platforms, hyperscale infrastructure, advanced cooling technologies, and Cadence Allegro/Sigrity or Siemens Xpedition/HyperLynx is highly valued. Learn more and apply today https://lnkd.in/esWuzZ9w Powered by Phizenix – WBENC & Minority-Certified