Interview with NVIDIA's Mike Hara (HARDWARE)
By Brian Neal
Tuesday, April 1, 2003 3:32 PM EST
There's an interesting article at Penstarsys based on an interview with NVIDIA's Mike Hara. The article covers a variety of topics, including the Xbox and Xbox 2, as well as the mobile market, TSMC, and more. On the subject of TSMC:
TSMC was initially supposed to implement low-k in their 0.13u Cu process in Q3 2002, but it didn�t turn out to be the case. NVIDIA initially designed the NV-30 to utilize a low-k design, but that was dropped very shortly due to the increased risk that the low-k process will not be available. This turned out to be a good decision, but one that was not important enough to get the NV-30 out in a timely manner. Due to these process technologies, the NV-30 was delayed time and again, and only now are we seeing these products trickle into the market. Going with IBM as a primary partner will help to alleviate these problems, as the IBM fab at East Fishkill is begging for customers to use their advanced processes on 300 mm wafers. IBM already has available low-k and SOI features for bulk 0.13u Cu products. NVIDIA thinks that this is perfect for their next round of products.
It was announced last week that NVIDIA and IBM had made a foundry agreement:
IBM will start out this summer making Nvidia graphics products on its 0.13-micron bulk CMOS process with the fluorinated silicate glass (FSG) dielectric, rather than the more challenging low-k SiLK dielectric.
This doesn't mean the end of NVIDIA's relationship with TSMC, however. It has been indicated in the interview that IBM will manufacturer high-end parts due to be released this Fall, while TSMC will handle the bulk of NVIDIA's production needs.
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Power5 Prototypes Arrive (CPU)
By Brian Neal
Tuesday, April 1, 2003 2:58 PM EST
Thanks to adipor for posting about this article on IBM's upcoming Power5 microprocessor. Successor to the Power4, Power5 will implement both on-chip multiprocessing and multithreading. It is said that the chip could deliver up to four times the performance of the current Power4.
Power5 could deliver up to four times the computer performance of Power4. It will have more capabilities for conserving electrical power, and it will be more highly integrated to become a building-block component for very high-performance supercomputers.
Mark Papermaster, the director of processor design for IBM's server group, says Power5 is right on track.
The chip, after exhaustive testing and tweaking, will show up in servers that IBM will introduce during the first half of 2004. The Lawrence Livermore National Laboratory has signed up to buy a supercomputer that will use 12,544 Power5 chips.
As mentioned in the quote above, LLNL will purchase a supercomputer with over 12,000 Power5 CPUs. It's not clear how many physical CPUs such a system would contain, as they could be counting individual cores or even logical CPUs. Or not, in which case the count would be even higher in those terms.
According to the article, the first working Power5 prototypes arrived during the past month.
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