AI Demand Remains Strong, but Investors Are Reassessing Capital Efficiency

In late October 2026, U.S. technology stocks experienced a significant correction as investors reacted to Intel’s weaker-than-expected outlook and growing concerns about free cash flow (FCF) pressures among major cloud service providers (CSPs).

From an industry perspective, these developments reflect two fundamentally different challenges.

Intel is facing difficulties related to manufacturing competitiveness, product mix, capital expenditure, and cash flow management. Meanwhile, CSPs are confronting a widening gap between the pace of AI infrastructure investment and the realization of commercial returns.

Neither development necessarily indicates a structural slowdown in AI demand.

According to Intel’s third-quarter 2026 financial results, quarterly revenue reached $16.5 billion, representing 21% year-over-year growth. However, the company’s fourth-quarter revenue guidance declined to $15.0–16.0 billion, with non-GAAP earnings per share projected at $0.25.

Importantly, Intel indicated that demand for certain data center products remained strong, with some product categories experiencing supply constraints. In contrast, the PC market faced pressure from rising memory prices, constrained enterprise IT budgets, and inventory adjustments.

This suggests that Intel’s challenges are not the result of a synchronized decline across all business segments but rather reflect increasing divergence between end markets.

At the same time, major technology companies—including Amazon, Microsoft, Alphabet, and Meta—continue to expand their investments in AI infrastructure.

Combined capital expenditures among these companies are expected to reach several hundred billion dollars in 2026.

The central question for financial markets is increasingly clear:

When will investments in AI servers, GPUs, custom ASICs, networking infrastructure, power systems, and data centers generate sufficient operating cash flow to justify their scale?

For the semiconductor supply chain, this marks a transition from an industry focused primarily on expanding AI computing capacity toward one that must simultaneously optimize manufacturing yield, system cost, and return on invested capital.

We will discuss the topics …..

• Intel EMIB vs. TSMC CoWoS: Two Different Advanced Packaging Architectures

• EMIB Yield Challenges: Integrating Silicon Bridges Into ABF Substrates

• TPCA Industry Trends: ABF Substrates Are Becoming Critical Advanced Packaging Platforms

• EMIB vs. CoWoS: Manufacturing Yield Must Be Evaluated at the Package Level

• CSP Free Cash Flow Pressure: AI Infrastructure Enters a Capital-Intensive Phase

• AI ASIC Growth Will Increase the Strategic Importance of Advanced Packaging

• Beyond CoWoS and EMIB: Glass Substrates and the Next Generation of Packaging Materials

• Opportunities for Taiwan’s Semiconductor Supply Chain

• Conclusion: AI Competition Is Shifting Toward Manufacturing and Capital Efficiency

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At the opening ceremony and main forum of Foxconn Technology Day on October 30, 2026, Foxconn’s message went beyond manufacturing scale. The company showcased how it is bringing precision machining, product design, system integration, and mass production together in a unified engineering model. From AI server racks, CPO switches, and modular data centers to a new lineup of electric vehicles, Foxconn’s central proposition is that vertical integration can shorten development and production cycles—and turn technologies once confined to labs or individual products into repeatable, scalable manufacturing processes.

The event highlighted three clear signals: AI rack output has doubled year over year, CPO is moving toward commercial production, and Foxconn is expanding its EV platform lineup with the Model A+, Model K, and Model K+.

Vertical integration starts on day one of product development

Foxconn said it introduced 941 new products for global Tier 1 customers in 2025, an average of about 2.5 products per day. More than half were developed under ODM or JDM models, reflecting a role that extends beyond contract assembly to include design, validation, and mass production tailored to customer requirements.

The group has approximately one million employees, including about 122,000 engineers. Foxconn reported that it obtained 2,492 patents over the past year, covering materials, equipment, and processes, and that it has been named to Clarivate’s Top 100 Global Innovators list for nine consecutive years. Foxconn also said it has maintained an ICT EMS market share above 40% for many years. Its globally managed land area exceeds 40 million square meters—equivalent to approximately 6,500 soccer fields. These figures demonstrate the group’s scale, but the forum’s larger point was how that scale can be converted into engineering capabilities that span products and processes.

Foxconn classifies its precision manufacturing capabilities into five levels. Wire products and protective covers require precision at around the centimeter level; server and EV structural components at around 50 microns; mobile phone components and precision molds at around 5 microns; optical lenses and optical communications components at 1 micron or finer; and, at the most advanced end, wafer manufacturing at the nanometer scale. Foxconn integrates four major manufacturing capabilities—subtractive manufacturing, forming, additive manufacturing, and joining—to address these different precision requirements.

In metal processing, Foxconn uses high-precision molds to form sheet metal through direct compression. For example, holes in laptop keyboards can be formed in a single operation. Foxconn said this process improves material utilization by 3.3 times compared with traditional machining, while precision molds can achieve an accuracy of 2 microns. The company also uses high-speed spindles operating at up to 40,000 rpm, together with precision cutting tools, to achieve machining accuracy of less than 1 micron. These capabilities are used for optical communications chip connectors and micro-optical components.

Foxconn’s definition of vertical integration goes beyond placing different types of factories within the same group. It brings component, mold, functional module, and system experts together as one team from the earliest stages of product development. The goal is to move optimization beyond individual components and improve the performance of the complete system. Engineering teams in Taiwan and the United States work in shifts across time zones to keep development moving around the clock. Foxconn said that some projects that would otherwise take three months can be completed in three weeks through this approach.

This integration also carries into production. Problems identified during assembly are fed back to design, mold, and machining teams for joint analysis and correction. Foxconn cited a precision substrate that guides optical fibers along defined tracks. The spacing error between tracks is kept within 0.3 microns, with a total error of just 0.7 microns. The company said it maintains the same level of precision and consistency across every production batch.

Process changes can also reduce cost and energy use. Foxconn said that replacing CNC machining of metal enclosures with precision molding and stamping could save approximately 8.33 million kWh of electricity per year at an annual shipment volume of one million units. That is roughly equivalent to the annual electricity use of 1,800 Taiwanese households, while reducing carbon emissions by nearly 1,900 tons. Foxconn identifies speed, quality, engineering services, flexibility, and cost as its five core competitive strengths. Its organizational culture, described as “division of labor” and “sharing,” is intended to let each unit develop its expertise and then share its technology, experience, and problem-solving methods across the group.

AI rack expansion and CPO’s move toward production

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The New Geography of Globalization: How AI, Geopolitics, and Supply Chains Are Redrawing the Global Economic Map

A Different Era for the Global Economy

For the past three decades, multinational corporations have followed a relatively simple principle: manufacture wherever production costs are lowest.

China became the world’s factory. Southeast Asia absorbed labor-intensive manufacturing. Taiwan and South Korea established their dominance in semiconductors, while the United States retained leadership in software, chip design, and global capital markets.

This division of labor generated extraordinary economic efficiency. It also created an interconnected global supply chain in which disruptions in one region could quickly spread across entire industries.

Yet by 2026, the economic landscape has fundamentally changed.

At the 2026 Cathay Asset Management Summit, Chief Economist of Cathay United Bank, addressed the topic of regional economic growth and supply chain restructuring, highlighting a broader transformation in global investment and industrial development.

The implications extend far beyond relocating factories from one country to another.

The world is moving from globalization built primarily around cost efficiency toward a new model shaped by economic security, technological capabilities, industrial policy, and supply chain resilience.

For investors, this shift suggests that future capital flows may increasingly depend not simply on which economies grow fastest, but on which regions control technologies and industrial capabilities that are difficult to replace.

Globalization Is Becoming Regional, Not Disappearing

If the old globalization model resembled a single production line stretching across continents, the emerging model looks more like a network of interconnected regional manufacturing centers.

The United States is seeking to rebuild domestic capabilities in strategic technologies and advanced manufacturing. Europe is emphasizing strategic autonomy and energy security. Japan is investing heavily in semiconductor manufacturing, while India and Southeast Asia are competing to attract the next generation of industrial investment.

This does not necessarily mean global trade is collapsing.

According to the World Trade Organization’s World Trade Report 2026, the share of global merchandise trade accounted for by low- and middle-income economies increased from approximately 23% in 1995 to 45% in 2024.

The broader lesson is that global economic activity is becoming more geographically distributed rather than concentrated in a single manufacturing powerhouse.

Companies are consequently moving away from optimizing supply chains around one preferred production location.

A technology company might design chips in California, manufacture advanced semiconductors in Taiwan, conduct portions of assembly and testing in Malaysia, and complete system integration across several regional markets.

Such arrangements may increase operational complexity and costs, but they can also reduce exposure to geopolitical disruptions, export restrictions, and excessive supplier concentration.

The next generation of globalization may not be cheaper, but it will need to be more resilient.

Artificial Intelligence Is Fueling a New Global Capital Expenditure Cycle

If geopolitics is pushing supply chains toward regional diversification, artificial intelligence is accelerating the process.

Unlike previous digital revolutions, AI is not simply a software story.

Every large AI data center requires sophisticated GPUs, advanced semiconductor manufacturing, high-bandwidth memory, optical communication systems, electrical infrastructure, and increasingly complex cooling technologies.

This makes AI one of the few technological transformations capable of simultaneously stimulating digital innovation and large-scale physical industrial investment.

During the internet era, technology companies generated much of their value through software, digital platforms, and network effects.

Today, access to computing capacity has become an increasingly important competitive advantage.

Companies such as NVIDIA, AMD, Google, Amazon, Microsoft, and Meta are therefore competing not only to develop more powerful AI systems, but also to secure the infrastructure required to operate them.

This transformation is exposing bottlenecks across the semiconductor supply chain.

Advanced wafer fabrication is only one part of the equation. HBM availability, advanced packaging capacity, ABF substrates, high-speed optical transceivers, power infrastructure, and liquid-cooling systems can all influence how quickly AI infrastructure is deployed.

A semiconductor may be ready for production, but the final AI system can still be delayed by limitations elsewhere in the supply chain.

For investors, this is an important distinction.

The AI investment opportunity extends well beyond GPU designers.

Specialty materials, packaging technologies, optical interconnects, power equipment, and thermal management may capture a growing share of the value created by AI infrastructure expansion.

Southeast Asia’s Rise Is No Longer Just About Cheap Labor

Southeast Asia has emerged as one of the principal beneficiaries of global supply chain diversification.

Vietnam continues to attract electronics manufacturing and semiconductor-related investments. Malaysia has established a strong position in semiconductor assembly, packaging, and testing. Singapore remains a significant center for advanced manufacturing, research, and regional corporate operations.

These economies, however, are following different development paths.

Vietnam’s opportunities are closely linked to electronics manufacturing clusters and the gradual upgrading of local industrial capabilities.

Malaysia may have opportunities to expand beyond conventional outsourced semiconductor assembly and testing into higher-value packaging technologies, equipment, and materials.

Singapore’s competitive advantage lies more heavily in its established infrastructure, engineering ecosystem, research capabilities, and ability to coordinate regional operations.

Yet relocating manufacturing is rarely as straightforward as announcing a new factory.

New production facilities require reliable electricity, water, engineering talent, transportation networks, and local supplier ecosystems.

Government subsidies and tax incentives can reduce initial investment costs, but they cannot instantly create a sophisticated industrial cluster.

This is particularly relevant to semiconductor manufacturing.

From equipment installation to process qualification, customer validation, yield improvement, and stable volume production, a new semiconductor facility must overcome considerable technical and operational challenges.

Capital can build a factory relatively quickly. Manufacturing expertise, supplier relationships, and customer confidence take much longer to develop.

As a result, the winners of supply chain diversification will not necessarily be the countries offering the cheapest land or labor.

They will be the economies capable of creating reliable industrial ecosystems that companies can operate profitably over the long term.

Taiwan’s Challenge Is Not Simply Preventing Industrial Relocation

Taiwan occupies a unique position in the global semiconductor industry.

TSMC’s advanced process technologies, the packaging capabilities of companies such as ASE, and the island’s extensive network of semiconductor equipment, materials, and electronics suppliers have created one of the world’s most sophisticated manufacturing ecosystems.

As the United States, Japan, and Europe increase semiconductor investment, Taiwanese companies are also expanding their international operations.

This development is sometimes interpreted as evidence that semiconductor manufacturing is gradually leaving Taiwan.

But that framing overlooks an essential distinction.

The more important question is which manufacturing activities can be geographically replicated, and which technological capabilities remain highly concentrated.

Mature-node manufacturing, certain packaging and testing operations, and electronics assembly can be redistributed according to market conditions and customer requirements.

Advanced process technologies, heterogeneous integration, sophisticated process engineering, and complex supplier coordination are considerably harder to reproduce.

Advanced packaging provides a useful example.

A high-performance AI accelerator is no longer simply a collection of individual chips. Its performance and reliability depend on signal integrity, power delivery, thermal management, package warpage, and mechanical reliability.

Solving these problems requires extensive research, manufacturing experience, customer qualification, and cooperation across multiple suppliers.

The competitive advantage therefore lies not merely in owning production facilities, but in coordinating the underlying technologies that make advanced semiconductor systems commercially viable.

For Taiwan, the strategic challenge is to maintain leadership in these difficult-to-replicate capabilities while participating in the international expansion of semiconductor manufacturing.

Similar considerations apply to critical technology suppliers in South Korea, Japan, the United States, and Europe.

In the next phase of global industrial competition, the number of factories a company operates may matter less than the technological bottlenecks it can solve.

SemiVision Perspective: Three Capabilities Will Define the Next Generation of Industrial Winners

SemiVision believes that global supply chain restructuring is fundamentally changing how value is distributed across the technology industry.

The companies best positioned for the next decade may not necessarily be those with the greatest production capacity.

Instead, competitive advantage will increasingly depend on three capabilities.

• First: Control over difficult-to-replace technologies.

  Advanced semiconductor manufacturing, HBM, hybrid bonding, co-packaged optics, and specialized electronic materials share an important characteristic: they are technically demanding and require lengthy qualification cycles.

  As global supply chains diversify, companies controlling these capabilities may enjoy stronger competitive positions than manufacturers offering relatively standardized services. Technology scarcity can become a source of pricing power, although its durability will depend on competition, customer relationships, and the pace of technological substitution.

• Second: The ability to manufacture and deliver across multiple regions.

  Future semiconductor suppliers will need to navigate trade regulations, export restrictions, tariffs, customer localization requirements, and increasingly complex geopolitical relationships.

  Companies capable of transferring production processes, maintaining quality standards, and supporting customers across different regions may gain a meaningful competitive advantage.

  However, geographical diversification does not automatically translate into greater profitability.

  New factories bring higher fixed costs, execution risks, and potential underutilization. Investors must distinguish between strategic manufacturing announcements and facilities that can generate sustainable returns.

• Third: The ability to solve the actual bottlenecks in AI infrastructure.

  As AI computing expands, the industry’s constraints are spreading beyond transistor performance.

  Memory bandwidth, packaging interconnect density, optical communication, electrical power, and thermal management are becoming critical determinants of system-level performance.

  SemiVision is particularly focused on advanced packaging materials, ABF substrates, high-speed PCBs, optical interconnects, and next-generation thermal management technologies.

Historically, many of these technologies were treated as supporting components within the semiconductor industry.

Today, they can influence the deployment schedule, energy efficiency, reliability, and economics of entire AI computing systems.

Consider advanced packaging substrates. Even when GPU manufacturing capacity is available, insufficient substrate supply or packaging yield can limit final accelerator shipments.

Similarly, improvements in optical connectivity and thermal management can determine whether increasingly powerful AI systems remain economically practical at the rack and data-center levels.

This suggests that some of the most important beneficiaries of AI infrastructure expansion may operate outside the most visible segments of the semiconductor industry.

Nevertheless, demand growth alone does not guarantee shareholder returns. Capital intensity, supplier concentration, technical substitution, and the timing of capacity expansion will remain central considerations.

Conclusion: The World Is No Longer Looking Only for the Cheapest Supply Chain

Globalization is not coming to an end.

It is evolving from a system optimized primarily for efficiency into one where efficiency, resilience, technological capabilities, and national industrial policies must coexist.

The United States is rebuilding strategic manufacturing capabilities. Japan and Europe are expanding semiconductor investment. Southeast Asia is moving toward higher-value industrial activities. India is working to develop a more comprehensive electronics ecosystem, while Taiwan and South Korea continue to occupy essential positions in advanced semiconductor technologies.

But supply chain diversification is not free insurance.

Duplicated manufacturing investment, higher operating costs, and additional coordination requirements could undermine some of the efficiency gains achieved through decades of globalization.

The challenge for both governments and corporations will be finding an economically sustainable balance between security and efficiency.

SemiVision believes the next decade’s technology winners will not simply be the companies serving the largest markets. They will be those controlling essential technologies, delivering reliably across regions, and solving the industry’s most difficult infrastructure bottlenecks.

Global capital may consequently shift from pursuing low-cost manufacturing capacity toward businesses characterized by technological scarcity, system integration expertise, and difficult-to-replicate industrial capabilities.

The geography of the world economy is being redrawn.

Yet the fundamental question determining corporate value remains remarkably simple:

What can a company do that its competitors cannot easily replicate?

From Baidu AI Cloud’s large-scale computing infrastructure to the growing importance of PCBs, advanced packaging, thermal management, and power delivery.

The global artificial intelligence industry is entering a new phase of competition.

Over the past several years, investors and semiconductor companies have focused primarily on NVIDIA GPUs, high-bandwidth memory (HBM), advanced semiconductor manufacturing, and sophisticated packaging technologies such as CoWoS.

Yet as AI computing clusters expand from hundreds of accelerators to thousands—and eventually tens of thousands—a different challenge is beginning to emerge.

Even if companies can acquire enough AI chips, can they actually keep those chips operating reliably and efficiently over extended periods?

At a recent AI and PCB industry forum, Baidu AI Cloud delivered a presentation titled The Engineering Behind 10,000-Accelerator Clusters, outlining its experience developing large-scale AI infrastructure.

What made the presentation particularly interesting was that Baidu did not focus exclusively on the computing performance of individual AI accelerators.

Instead, it emphasized cluster stability, hardware-software coordination, fault tolerance, and the reliability of the underlying electronic components.

These included printed circuit boards (PCBs), storage modules, semiconductor packaging, liquid-cooling systems, and power delivery infrastructure.

For SemiVision, the presentation highlighted an important transition in the AI infrastructure industry.

As computing clusters grow larger, system value will increasingly depend not only on semiconductor performance but also on whether the entire hardware supply chain can maintain stable, continuous operation.

From 10,000 to 30,000 Accelerators: AI Infrastructure Moves Toward Full-Stack Integration

Baidu AI Cloud has developed its AI infrastructure around a four-layer architecture covering chips, cloud infrastructure, models, and AI agents.

At the hardware layer, Baidu relies on AI accelerators such as its Kunlun P800, alongside the networking and computing infrastructure required to support large-scale deployment.

The cloud layer includes Baidu’s Baige AI computing platform, which manages computing resources, distributed training, and cluster scheduling.

Above that sits Baidu’s foundation-model ecosystem, including its ERNIE models and Qianfan platform.

The final layer consists of AI agents and enterprise applications built on these computing resources.

This architecture reflects a broader industry trend.

Cloud service providers are gradually moving beyond simply purchasing high-performance accelerators. Instead, they are seeking greater control over the entire computing stack, including chips, servers, networking, software, and applications.

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From space infrastructure to robotics and data centers, Y Combinator’s 11 startup priorities for 2027 reveal where the next wave of technological value may emerge.

For much of the past three years, Silicon Valley has been obsessed with artificial intelligence models. Bigger models, faster inference, longer context windows, and more powerful AI agents have dominated the investment narrative.

But the conversation is changing.

Y Combinator (YC), one of Silicon Valley’s most influential startup accelerators, has released its 11 Requests for Startups for Winter 2027. The list offers a revealing glimpse into how investors are thinking about the next stage of technological development.

Rather than focusing exclusively on building more powerful AI models, YC is increasingly interested in the physical infrastructure, financial systems, specialized technologies, and industrial capabilities required to bring AI into the real economy.

For SemiVision, the message is particularly significant: The next phase of AI growth may create as much opportunity in factories, semiconductor supply chains, energy systems, and industrial infrastructure as in software itself.

The Physical Economy Is Becoming Silicon Valley’s Next Frontier

Several of YC’s priorities point toward an important shift from digital products to capital-intensive industries.

The first is the space economy.

YC believes increasingly affordable space launches could unlock business models that were previously economically impossible. As launch costs decline, opportunities could emerge in orbital manufacturing, satellite infrastructure, logistics, and space-based services.

Another priority is American-made robotics.

Although AI foundation models are improving robots’ ability to understand and interact with their surroundings, physical hardware remains a major constraint. Motors, sensors, precision gears, rare-earth magnets, batteries, and semiconductors are all essential components.

YC is particularly interested in startups capable of establishing domestic manufacturing capabilities.

This reflects a broader industrial reality: developing intelligent software is fundamentally different from manufacturing reliable machines at scale.

SemiVision Perspective: The robotics opportunity extends far beyond robot manufacturers. Semiconductor suppliers, power electronics companies, precision-component manufacturers, and industrial sensor developers could become important beneficiaries.

However, localization also introduces higher capital requirements, supply-chain duplication, and manufacturing execution risks. Building competitive domestic production capacity requires more than venture funding.

The AI Infrastructure Boom Needs a New Financial System

One of YC’s more interesting proposals is the creation of financial infrastructure for the physical AI economy.

Traditional venture capital works relatively well for software companies that can scale without enormous upfront investment.

Robotics factories, GPU clusters, and data centers operate differently.

They require substantial capital expenditure before meaningful revenue can be generated.

YC therefore sees opportunities for specialized lenders, equipment leasing businesses, securitization platforms, and financial instruments tied to computing infrastructure.

This could eventually create an entirely new asset-financing ecosystem around AI hardware.

At the same time, YC highlights increasingly severe bottlenecks in the data center supply chain.

GPU availability is only one part of the equation.

Transformers, switchgear, circuit breakers, electrical equipment, and liquid cooling systems are becoming critical constraints on infrastructure deployment.

Some large transformers, according to YC, face lead times extending to approximately three years.

SemiVision Perspective: This is among the most important investment themes in the entire list.

The semiconductor industry has spent years optimizing chip performance, advanced packaging, HBM bandwidth, and interconnect efficiency. Yet a data center cannot generate revenue if electrical infrastructure or cooling equipment delays deployment.

For investors, the relevant equation is no longer simply GPU shipments multiplied by average selling prices.

It increasingly involves the interaction between computing capacity, available electricity, cooling infrastructure, construction schedules, and financing costs.

The next infrastructure winners may include companies that solve these less visible bottlenecks.

Specialized AI Could Challenge the Economics of General-Purpose Models

YC is also interested in the next generation of specialized foundation models.

Rather than competing directly with the largest AI laboratories, startups could develop smaller, more efficient models tailored to manufacturing, energy, biology, and other technically demanding industries.

The objective is not necessarily to achieve the highest benchmark score.

It is to deliver reliable domain-specific performance at significantly lower inference costs.

Another proposed direction involves helping companies develop and continuously improve their own AI models instead of relying entirely on external providers.

This connects naturally with YC’s interest in offline private AI systems for banks, hospitals, defense contractors, and other institutions with strict security requirements.

Meanwhile, YC sees opportunities for AI systems that enable ordinary workers to perform expert-level tasks, as well as language models optimized for high-quality writing rather than coding or mathematical reasoning alone.

SemiVision Perspective: This could gradually reshape enterprise AI spending.

General-purpose frontier models will remain important, but enterprises may increasingly combine them with smaller proprietary models trained on internal knowledge.

In semiconductor manufacturing, for example, specialized AI systems could support defect classification, process optimization, predictive maintenance, yield analysis, and engineering decision-making.

The critical competitive advantage may shift from model size toward proprietary industrial data, domain expertise, deployment efficiency, and continuous performance improvement.

That creates opportunities for industrial software developers, semiconductor equipment suppliers, edge AI hardware providers, and companies controlling valuable technical datasets.

Governments Could Become an Unexpected AI Growth Market

Two additional YC priorities involve government administration.

The first focuses on creating a unified verification infrastructure for government benefits, allowing individuals to securely verify income, residency, and eligibility across different programs.

The second targets municipal administration, including building permits, zoning reviews, inspections, licensing, and public-record processing.

Both address inefficient processes that remain heavily dependent on manual paperwork.

These opportunities may appear less exciting than robotics or space technology, but they could become attractive markets for startups capable of navigating regulatory complexity.

Public-sector customers also create different competitive dynamics. Procurement cycles can be lengthy, yet successful integration may generate durable customer relationships.

The challenge is ensuring that automation improves administrative efficiency without compromising privacy, accountability, or human oversight.

SemiVision Conclusion: The Next AI Winners May Be Hidden in the Supply Chain

YC’s 2027 priorities suggest that the AI investment cycle is entering a new phase.

The first wave of value creation was concentrated in foundation models and accelerated computing.

The second wave expanded into AI applications, cloud infrastructure, and advanced semiconductor packaging.

The emerging third wave may be defined by the integration of intelligence into the physical economy.

This means greater attention to robotics, electricity infrastructure, cooling technologies, semiconductor materials, industrial equipment, financing systems, and specialized enterprise AI.

For the global semiconductor ecosystem, this transition is particularly important.

Advanced packaging, power management, high-speed interconnects, optical communication, thermal management, and semiconductor manufacturing equipment will all influence how efficiently AI can scale.

Yet not every bottleneck automatically represents an attractive investment. Long qualification cycles, capital intensity, customer concentration, and uncertain utilization rates can limit returns even in fast-growing markets.

SemiVision believes the most promising opportunities will emerge where critical technical bottlenecks intersect with sustainable commercial demand and defensible supply-chain capabilities.

The next generation of technology giants may not necessarily build the smartest AI models.

Some may instead build the infrastructure, components, and industrial systems that make intelligent machines economically practical.

Silicon Valley’s next gold rush may be less about creating intelligence—and more about building the world that intelligence requires.

With abundant clean energy, world-class AI talent, advanced microelectronics research, and refundable provincial R&D tax credits of up to 30%, Québec is positioning itself as an attractive destination for global technology investment. For Taiwan’s semiconductor and advanced packaging supply chain, this emerging Canadian ecosystem deserves closer attention.

When discussing the global semiconductor industry, Canada rarely receives the same attention as Taiwan, the United States, Japan, or South Korea. However, as artificial intelligence, quantum computing, silicon photonics, and advanced packaging continue to evolve, Canada is pursuing a different approach to building its technology industry.

During SemiVision’s recent visit to Québec, we attended presentations from Investissement Québec International and Montréal International to better understand the province’s industrial development strategy and investment environment.

What stood out was not an ambition to replicate Taiwan’s semiconductor manufacturing ecosystem or compete directly in leading-edge logic fabrication.

Instead, Québec is building upon its existing strengths: clean hydropower, internationally recognized AI research talent, established microelectronics and quantum research capabilities, and an attractive government-backed investment and R&D incentive framework.

For Taiwan’s semiconductor industry, this represents an interesting opportunity to explore complementary partnerships rather than direct competition.

Québec: More Than Just a Canadian Province

Located in eastern Canada, Québec has a population of more than nine million people and shares over 810 kilometers of border with the United States.

According to Investissement Québec, the province generated more than CAD 610 billion in GDP in 2024, while exports of goods and services to the rest of Canada and international markets exceeded CAD 280 billion, representing approximately 46% of its GDP.

These figures highlight Québec’s highly integrated position within the North American economy and its strong dependence on domestic and international trade.

The province also benefits from a diversified industrial base covering aerospace, digital technologies, clean energy, aluminum, mining, life sciences, agri-food, and logistics.

Montréal, for example, is one of the world’s major aerospace hubs. Airbus, Boeing, and Bombardier all maintain operations in the region, supported by a well-established network of suppliers, engineering talent, and research institutions.

Montréal is also an important center for software development, digital creativity, and video game production.

More recently, however, Québec has increasingly emphasized artificial intelligence, quantum technologies, microelectronics, and energy transition as strategic priorities for its next phase of industrial development.

The provincial government plays an active role in supporting this transformation.

Investissement Québec, the province’s economic development and investment organization, supports local business expansion, international exports, and foreign direct investment (FDI).

According to its 2025–2026 presentation, the organization supported more than 6,000 businesses, managed approximately CAD 16.4 billion in assets, and facilitated 99 foreign investment projects representing approximately CAD 6.1 billion.

Its services go far beyond financial incentives. They include market intelligence, site selection, financing solutions, local supplier identification, technological support, workforce development, and international business expansion.

For foreign technology companies considering entering Canada, this provides a relatively comprehensive government-supported investment ecosystem.

Québec’s Greatest Industrial Advantage May Not Be Technology, but Electricity

As AI data centers continue to expand globally, electricity availability has become one of the most important constraints on technology infrastructure development.

This is where Québec has a particularly interesting advantage.

Thanks to abundant water resources and decades of public investment in large-scale hydroelectric infrastructure, Québec has developed a distinctive electricity generation system.

According to the presentation, approximately 96% of its electricity generation comes from hydropower, with another 3.5% from wind energy and a small remaining portion from other sources, including diesel generation in isolated communities.

Hydro-Québec, the province’s public electricity utility, is one of the world’s largest hydropower producers.

Why does this matter for the technology industry?

Semiconductor manufacturing, AI data centers, battery materials, and aluminum processing all require substantial amounts of electricity.

For international corporations pursuing decarbonization targets, access to reliable, low-carbon electricity is becoming an increasingly important consideration when selecting manufacturing and R&D locations.

However, Québec also recognizes that its existing hydropower advantage does not automatically guarantee sufficient electricity supply for future industrial expansion.

Hydro-Québec’s Action Plan 2035 anticipates approximately 60 TWh of additional electricity requirements by 2035, alongside plans to install approximately 10 GW of new wind generation capacity.

Why wind energy?

The explanation is largely practical.

Developing large hydroelectric dams can require decades of planning, construction, and environmental assessments. Wind farms can generally be deployed more quickly, allowing Québec to increase generation capacity over a shorter period.

This highlights a broader challenge facing the global technology industry.

The next bottleneck in AI and semiconductor expansion may not simply be capital investment or chip manufacturing capacity. It could increasingly be electricity availability.

Nevertheless, abundant renewable energy does not necessarily mean unlimited power access for new factories or data centers. Grid connection timelines, power allocation, and regulatory approvals remain important considerations for investors.

Five Innovation Zones: Connecting Quantum Computing, Semiconductors, and Energy Technologies

Another interesting aspect of Québec’s industrial strategy is its Innovation Zones initiative, launched in 2022.

Unlike conventional industrial parks, these innovation zones are designed to connect universities, research institutions, multinational corporations, and small and medium-sized enterprises within specialized technology ecosystems.

The objective is to accelerate the transition from fundamental research to prototype development, industrial validation, and commercial deployment.

Québec currently has five major innovation zones focusing on quantum technologies, microelectronics, energy transition, aerospace, and intelligent mining.

For the semiconductor industry, two zones deserve particular attention: DistriQ and Technum Québec.

DistriQ: Building a Quantum Technology Ecosystem

Located in Sherbrooke, DistriQ focuses on quantum computing, quantum communications, and quantum sensing.

The region benefits from the presence of Université de Sherbrooke and its Institut quantique, alongside a growing network of quantum technology startups and industrial partners.

One important observation is that quantum computing is not simply about developing better qubits.

Building commercially viable quantum systems also requires cryogenic electronics, precision measurement, control circuits, photonic components, packaging, and testing technologies.

Many of these requirements overlap with the semiconductor industry’s existing capabilities.

For Taiwan’s semiconductor supply chain, this could eventually create opportunities in precision manufacturing, advanced packaging, specialized electronics, and quantum hardware integration.

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September 8, 2026 — Sheraton Hsinchu Hotel, Taiwan. ficonTEC Expert Seminar ASIA.

AI is changing how people work and communicate, bringing a touch of imagination even to the seminar’s opening remarks. Perhaps future panel discussions will take place with everyone joining from home, their faces on screen replaced by AI-generated characters. Yet the issue that brought participants together in person that day was a very tangible manufacturing challenge: how can the optical interconnects supporting AI move from small numbers of demonstration devices to reliable, affordable volume production?

Under the theme “The Future is Powered by Photonics—Building the Manufacturing Ecosystem Behind AI Infrastructure,” the seminar focused on three questions: how to move from prototype to production, where the next bottlenecks in photonics manufacturing will emerge, and how to shorten time to market. The official agenda featured partners including Femtum, HTSI, BizLink, and USI, bringing equipment, process technology, interconnect components, and system manufacturing into a shared discussion.

Across the presentations provided, the central question was how to maintain precision as production scales. Taiwan already has an industrial foundation spanning wafer fabrication, IC design, packaging and testing, and electronics manufacturing. In the silicon photonics era, these capabilities must connect more closely with optical design, fiber interfaces, cleaning, calibration, reliability, and servicing. Having specialist suppliers at every stage does not, by itself, mean the complete manufacturing process is mature.

From an AI Supply Chain to a Photonics Manufacturing Ecosystem

The opening remarks highlighted Taiwan’s importance to the AI supply chain, then raised a broader question: what does Taiwan still need to build as it moves from a component supply chain to a complete ecosystem? The question is relevant because AI system competitiveness depends on more than compute chips. It also depends on how efficiently data moves among accelerators, switches, and racks. As node counts increase, communication power, latency, and available bandwidth directly affect the utilization of expensive computing resources.

BizLink approached the discussion through data center architecture. The front-end network connects AI systems to external users and services, while the back-end network connects nodes working together on computation. Within the latter, scale-up emphasizes tighter accelerator interconnections, while scale-out enables more servers or compute nodes to work together. Both require dense, low-loss interconnects, but their transmission distances, protocols, mechanical requirements, and cost constraints differ. The choice cannot be based simply on the idea that optics is more advanced than electrical transmission.

The value of optical technology lies in overcoming electrical interconnect limitations in loss, power, and density under specific distance and bandwidth conditions. Copper retains suitable applications, while fiber links still require lasers, modulators, receivers, connectors, and control circuitry. The meaningful comparison is the effective data-carrying capacity of the complete link, its energy per bit, and the manufacturing and operating costs required to sustain that performance.

A photonics ecosystem therefore needs to move beyond a linear division of labor in which wafers are completed, packages are delivered, and systems are assembled. An optical engine’s interface design affects fiber arrays and test probes. Fiber exit directions affect heat sinks and rack routing. Cleaning methods and attachment materials influence subsequent coupling stability. These relationships must be coordinated during design so that unresolved upstream problems do not simply become downstream responsibilities.

LPO, NPO, and CPO: Different Trade-offs Behind Different Levels of Integration

LPO, NPO, and CPO appeared repeatedly throughout the seminar. Although they are often shown along the same development roadmap, they address different questions. Linear pluggable optics, or LPO, primarily changes signal processing inside the optical module. Near-packaged optics, or NPO, and co-packaged optics, or CPO, primarily concern where optical engines are placed and how they integrate with the main chip.

Removing the digital signal processor, or DSP, from an optical module can reduce the cost, power, and latency associated with that function. However, more of the signal compensation and validation responsibility shifts to the host serializer/deserializer, or SerDes, and the complete link. Electrical and optical specifications still have to be met. Eliminating the module DSP does not imply identical performance under every condition.

Both the LPO MSA definition and the Ethernet Alliance’s explanation place host capabilities and link conditions at the center of this architecture.

NPO moves optical engines closer to the main chip package, shortening the path traveled by high-speed electrical signals while retaining a comparatively separate assembly arrangement. CPO brings the optical engines within a shared packaging architecture, potentially reducing the electrical interconnect burden and increasing bandwidth density. It also ties optical, electrical, thermal, and yield considerations more closely together. If an optical engine fails, the consequences for servicing, replacement, and scrapping may extend further than they would with a pluggable module.

Speaking from a system manufacturer’s perspective, USI offered a practical assessment: greater integration must be evaluated against performance gains, manufacturing cost, and time to market. In this presentation, USI described an emphasis on NPO, combining optical engines with its electronic system-in-package capabilities to pursue a solution that is easier to introduce. This was the strategic focus of the seminar presentation; USI’s publicly announced optical interconnect portfolio also encompasses high-speed optical engines, NPO, and CPO.

Taiwan’s opportunities therefore need not be concentrated in a single, most advanced packaging approach. Customers have different bandwidth requirements, investment capacities, system lifetimes, and servicing conditions. Solutions that fit actual cost structures and complete reliability and production qualification also have value. TSMC’s COUPE should likewise be distinguished from the role of its CoWoS packaging platform. In its official 2026 technology announcement, TSMC stated that production of a CPO solution using COUPE on substrate was expected to begin that year. That schedule does not establish that other packaging materials can replace corresponding portions of the complete technology on a proportional basis.

The Real Test of Precision Is Repeatability After a Million Operations

The central challenge outlined by ficonTEC at the opening can be expressed simply: the industry must demonstrate that it can continuously manufacture large numbers of components at the required precision. Producing one low-loss connection in a laboratory and reliably producing thousands every day in a factory are separated by equipment availability, material variation, process windows, and operator practices.

This distinction is particularly important in optical assembly. Fibers, microlenses, and photonic chips must meet requirements for position, angle, focus, mode matching, and polarization. Small displacements can reduce coupled optical power. Correct-looking mechanical positioning does not necessarily produce the best optical result. Active alignment therefore measures optical signals while adjusting relative positions to find a coupling condition that meets specifications.

Finding the optimum position is only one step. Adhesive dispensing, curing, soldering, or other attachment methods can move components again. Temperature changes and differences in material thermal expansion can also alter coupling after shipment. A production process must develop alignment and attachment together, then verify that the completed product retains sufficient margin under its intended operating conditions. Without precision motion, optical feedback, and material control, the line may face repeated rework.

This is why faster operation alone is insufficient to justify an equipment upgrade. Units per hour, or UPH, must be considered alongside yield, downtime, and rework rates. Suppose ten consecutive process steps each have a 98% pass rate. Under a simplified model without rework, the overall pass rate would be approximately 82%. This is an illustrative calculation, but it shows how seemingly small losses at individual stations can consume substantial effective capacity when accumulated.

From a factory management perspective, the important measures are how many conforming products can be delivered each hour and how much cost each good unit must bear. Overall equipment effectiveness, or OEE, includes availability, performance, and quality. Unit cost must additionally account for materials, consumables, depreciation, maintenance, and labor. Scaling photonics beyond small-volume customized production requires turning micrometer and even submicrometer precision into a manufacturing capability that can be managed over the long term.

An Integrated Line or Expandable Manufacturing Cells?

ficonTEC compared two approaches to capacity expansion. The first is an integrated in-line production system: material enters at one end, passes through successive workstations, and emerges as a finished product. This approach can integrate handling, reduce manual contact, and potentially reduce the space between machines. However, overall capacity is constrained by the slowest station. If a station stops and buffering or bypass provisions are insufficient, upstream and downstream operations can also be affected.

The alternative is modular manufacturing cells. Laser assembly or die bonding, active fiber alignment, lens assembly, and testing can be assigned to separate equipment and linked through automated handling and scheduling. Because different steps have different processing times, a factory can add parallel equipment at bottleneck stations. This offers greater flexibility, but it also requires control of work-in-process movement, carrier standards, traceability, and scheduling. It involves more than placing several machines next to one another.

The choice depends on design stability, expected volume, changeover frequency, and process maturity. If optical engines are still undergoing rapid revisions, building a highly dedicated line too early may leave equipment unable to keep pace with product changes. Once a design is stable and demand is high, an integrated line becomes easier to optimize for cycle time and floor space. The modularity emphasized at the seminar preserves room to adjust both precision requirements and investment decisions.

ficonTEC’s platform strategy seeks to make R&D, new product introduction, or NPI, and production equipment share as many hardware modules and software concepts as practical. Its value lies in reducing the redevelopment needed when transferring a process from prototype equipment to production equipment. This does not eliminate transfer qualification. Changes in fixture stiffness, handling, environment, and actual cycle times can still affect process results.

The presentation also introduced a dual-engine approach to parallel operation, aiming to increase output per machine within a similar footprint and citing a throughput improvement target of approximately 60%. This figure should remain a target from that presentation, rather than a guarantee already achieved across all processes. Effective parallel operation depends on whether the two motion systems share cameras, measurement instruments, loading and unloading, or curing resources. If a shared resource is the bottleneck, adding motion mechanisms will not necessarily increase good-unit output proportionally.

Moving Test Earlier to Avoid Scrapping Expensive Assemblies

Photonics manufacturing adds another set of questions to conventional electrical testing. Beyond establishing whether electrical signals function correctly, testing must verify that light can enter, traverse, and leave the device—and that the coupling conditions during measurement are trustworthy. Probe position, fiber end-face contamination, or calibration drift can distort results, causing good chips to be rejected or nonconforming devices to pass.

One CPO process based on wafer-level electronic-photonic integration can be organized around four main test insertions. The first examines photonic circuits, devices, and basic electrical characteristics at the photonic integrated circuit, or PIC, wafer stage. The second checks electro-optical functionality after electronic and photonic integration at wafer level. The third performs functional testing, calibration, and necessary high-speed measurements on singulated optical engines. The fourth validates overall performance after the complete CPO package or module has been assembled. Process flows and insertion terminology vary by architecture, but the shared objective is early defect detection.

It is also necessary to distinguish when testing occurs from what is measured. O-O characterizes the response from optical input to optical output. E-O measures electrical drive to optical output. O-E measures optical input to electrical output. E-E examines electrical signal paths. These measurement domains can appear at different manufacturing stages. A capability in one domain does not establish all the testing needed at a particular insertion.

In densely integrated three-dimensional optical engines, optical and electrical interfaces may lie on opposite sides. ficonTEC’s WLT-D2 addresses this requirement by combining electrical testing through existing automated test equipment, or ATE, with active optical alignment on the other side. The DLT-D1 extends a similar concept to dies and optical engines, with configurations supporting up to three parallel test stations. Public product information establishes that these capabilities have been implemented in equipment; actual production cycle times and test coverage still need to be confirmed for each customer’s product.

The economic value of earlier testing is to establish trustworthy “known-good optical engines” before adding more expensive components. Passing an early test does not replace final module validation, aging, thermal cycling, or other reliability evaluations. A sound flow tests the additional risks introduced at each stage and uses earlier data to narrow subsequent investigations, avoiding the need to retrace the entire package whenever a failure occurs.

While traditional ATE and full characterization systems provide comprehensive testing capabilities, they come with higher costs and lower throughput. ficonTEC emphasized a shift toward System-Level Testing (SLT) that combines high-speed signal integrity validation, compact equipment design, increased parallelism, and lower cost per channel.

As AI infrastructure drives demand for higher-speed optical interconnects, the ability to deliver scalable, cost-efficient testing without compromising performance will become increasingly critical for high-volume manufacturing.

Femtum: Contamination Control Must Be Part of the Process

Femtum grouped production yield problems into two main sources: contamination and fabrication variation in photonic structures. The first may appear to be a cleaning issue, but it extends across the packaging flow. Dicing particles, adhesive residue, handling contact, environmental particles, and even recontamination after cleaning can affect microlenses, optical surfaces, or fiber end faces.

As a package integrates more optical channels, contamination can have broader consequences. Foreign material on a surface may obstruct a beam, increase scattering, or change coupling. If discovered on an unfinished optical engine, cleaning or replacement may still be possible. If it is detected only after the complete CPO module has been assembled, remediation becomes more expensive. Whether the entire assembly must be scrapped depends on channel fault tolerance, reworkability, and product specifications.

Femtum demonstrated selective laser cleaning: suitable pulses and scanning patterns cause contaminants to absorb energy and be removed while keeping effects on the underlying optical materials and coatings within acceptable limits. Its published solution uses short-pulse mid-infrared lasers to exploit absorption differences between contaminants and substrates for localized treatment. According to the on-site discussion, clean dry airflow and extraction are also needed to carry away removed material and reduce redeposition. This is a complete process, whose effectiveness cannot be judged solely from images of the surface after laser exposure.

Compared with manual wiping or broad-area cleaning, localized laser treatment may target only the regions requiring attention and integrate with image recognition and automated equipment. The speaker showed before-and-after comparisons of multiple contaminated samples and reported figures of 80%, 96%, and 97% for different contamination categories. However, the supplied material did not provide complete sample sizes, metric denominators, acceptance criteria, or all optical and reliability data before and after treatment. These figures should therefore be understood as results for particular samples and recipes, rather than overall CPO production yield.

The discussion also established an important limitation: the laser beam must be able to reach the surface being treated. Contamination inside sealed or obstructed structures must be addressed at a process stage where it remains accessible. This makes the placement of inspection and cleaning steps important. If a problem is discovered only at the end, even highly effective localized cleaning may be unable to recover the part.

Similarly, one customer’s experience with dry-ice cleaning does not establish that all carbon dioxide cleaning damages coatings. Method selection depends on the contaminant, optical material, geometry, and operating conditions. Laser cleaning must also establish its own process window and demonstrate that it does not introduce surface damage, insertion loss, or long-term failure risks. Femtum stated at the event that its laser sources and equipment integration were available, while new dies or packages could still require sample testing and recipe development. Commercial availability and completed production qualification for a specific customer are separate milestones.

Fabrication Variation and Trimming: Bringing Photonic Circuits Back to Their Design Targets

Contamination can be visible on a surface, while another source of yield loss lies within the photonic structure itself. Femtum’s subsequent discussion addressed trimming: post-fabrication adjustment of photonic devices. For microring resonators, filters, and interferometric structures, changes in waveguide dimensions, material refractive index, or local geometry can shift optical responses away from their design targets.

These devices rely on phase or resonance conditions. The same design can exhibit different center wavelengths or phase errors across dies, wafers, and lots. As a circuit integrates more structures that must work together precisely, calibration and control demands increase. The speaker used nanometer-scale fabrication variation to illustrate this sensitivity, but that does not establish identical yield problems across all silicon photonics architectures.

One common compensation method is thermal tuning, which changes refractive index through localized heating to bring a device to its intended operating point. It can also help track changes in operating temperature, but requires power, control circuitry, and calibration. If many devices must continuously compensate for substantial fabrication errors, this can partly offset the energy-saving advantages sought from optical interconnects.

The value of trimming lies in adjusting device characteristics during manufacturing to reduce the range of correction required from subsequent dynamic tuning. It addresses a different problem from cleaning: cleaning removes foreign contamination, while trimming corrects deviations in optical parameters. Both may improve yield, but neither replaces the other. Trimming also should not be interpreted as permanently eliminating all thermal drift during operation.

In Femtum’s published laser-trimming mechanism, the laser treats the glass cladding near a waveguide, inducing localized densification. Stress and the elasto-optic effect then alter the adjacent waveguide’s effective refractive index. The elasto-optic effect describes changes in a material’s optical properties under mechanical stress. When effective refractive index changes, the phase accumulated by light propagating through the waveguide changes as well. Optical feedback supports a “measure, trim, remeasure” correction loop. This explains how trimming can be implemented, but applicability still depends on the specific material stack and photonic structure.

At the seminar, Femtum cited functional yields in wafer-level optical testing of approximately 50% to 80% and suggested that thermal tuning could account for around 30% of chip power. These were estimates or examples used to illustrate the problem; the presentation did not supply complete data representative of different foundry platforms and product architectures. The power denominator is the chip, not an entire switch or data center. The reasonable industry interpretation is that fabrication variation and tuning costs belong in design and production assessments. Specific improvements must be established through before-and-after comparisons using the same architecture and test conditions.

Before a trimming solution enters production, its adjustment range, precision, speed, and long-term stability must be established, along with any additional optical loss it introduces. A substantial reduction in tuning power may still be unattractive to manufacturing if each device requires excessive test and processing time. The discussion again returns to the seminar’s central issue: functional improvement, yield gains, and throughput must work within the same cost model.

BizLink: Fiber Interfaces Are Becoming Central to Packaging Integration

BizLink’s presentation moved the focus beyond the chip. Once a photonic chip converts signals between electrical and optical domains, those signals still have to leave the package through fiber arrays, connectors, and cables to reach the system. The fiber array unit, or FAU, is a key interface. A microlens array may help redirect, focus, or match optical beams. The two serve different functions and should not be treated as the same component.

Moving from low-channel-count components to dense interfaces involves more than adding fibers. Fiber diameter, core position, pitch, end-face geometry, angle, and attachment all require control. Polarization-maintaining fibers also require alignment of their polarization axes. Achieving low loss on one channel does not establish that every channel in an array will simultaneously meet specifications after assembly and environmental testing.

The speaker discussed assembly challenges involving more than 80 channels and pitch errors below 2 μm. These should be treated as requirements for the designs under discussion. Actual allowable error depends on mode size, coupling method, and optical design. Dense arrays must also account for attachment-material shrinkage, overall deformation, and thermal stress. Otherwise, a structure that meets specifications during manufacturing may develop channel misalignment after temperature cycling.

BizLink’s stated capabilities cover fiber end-face processing, precision polishing, pitch conversion, polarization-maintaining alignment, and assembly and validation of FAUs with microlenses, prisms, or PICs. These tasks require both geometric metrology and optical testing. Image inspection can identify scratches, contamination, and structural defects. Beam profiles, insertion loss, return loss, and polarization extinction ratio assess different aspects of performance. Mechanical and environmental testing can then establish whether an interface withstands actual operating conditions.

The transcript also cited typical insertion loss of approximately 0.1 dB and a maximum of 0.25 dB for MPO cable products. Those figures refer to the interconnect products presented. They should not be applied to PIC-to-FAU coupling, microlens-to-waveguide coupling, or the total coupling loss of a CPO system. Supplier comparisons require matching interfaces, wavelengths, reference planes, and mating conditions before determining whether figures are comparable.

In its industry partnerships, BizLink, SENKO, and ficonTEC publicly announced a collaboration linking interconnect products, connector technology, and automation equipment. Three-party collaboration announcement BizLink’s acquisition target was Shenzhen-based XFS Communications. The acquisition agreement was announced on December 1, 2025, and completion was announced on January 5, 2026. These initiatives indicate an effort to strengthen optical interconnect capabilities, but successful integration must still be demonstrated through products and customer qualification.

USI and the System Perspective: Who Makes the Complete Product Deliverable?

USI brought a different position to the discussion: it is both a system manufacturer and a company expanding its optical interconnect component capabilities. According to its official January 2026 announcement, USI acquired a controlling stake in Chengdu-based EugenLight Technologies through its wholly owned subsidiary, Universal Optoelectronics, with plans to develop synergies between its optical interconnect activities and the relevant capabilities of ASE Technology Holding.

This dual role makes the issues more direct. System manufacturers want module suppliers to deliver reliable products that are easy to integrate and reasonably priced. Module suppliers need system manufacturers to clearly define operating environments, electrical conditions, and mechanical constraints. If each side pushes difficulties beyond its own interface, new problems can emerge during full-system deployment even when individual components pass their tests.

BizLink also identified diversity as a major challenge in current photonics packaging. Different ASICs, PIC platforms, and coupling methods produce different optical engines, FAUs, connectors, and fiber exit directions. Vertical coupling, edge coupling, and different micro-optical designs affect equipment access, thermal design, and detachable structures. Each approach may offer benefits, but without common interfaces, suppliers must repeatedly develop dedicated fixtures and test flows.

One frequently underestimated issue is the process handoff. Who completes the fiber assembly? Who installs optical elements on the PIC? What inspections must be passed before transfer to the packaging and test provider? If loss exceeds specification after handoff, should the investigation begin with the fiber, attachment, chip, or measurement system? Without predefined responsibilities, problems can circulate among suppliers and extend time to market.

The speaker also cautioned that comprehensive testing capabilities remain concentrated among a small number of large companies. PIC costs, precision automation investment, and development lead times create barriers for new entrants. Common interfaces and accessible testing services become important if optical interconnects are to serve a broader customer base. They can reduce duplicated investment and allow teams to devote more resources to product differentiation and qualification.

Detachable interfaces require joint consideration of serviceability and reliability. They may make replacement easier but impose additional requirements for mating, repeatable positioning, and contamination management. System manufacturers need interfaces that maintain performance at acceptable loss after mating and unmating, handling, and temperature changes. As packaging density rises, fiber bend radius, strain relief, and routing space further affect serviceability.

Light sources are another supply item that cannot be overlooked. The speaker noted that CPO light sources must meet requirements for noise, efficiency, temperature, and lifetime as well as output power. Different light-source types and locations change thermal management and service models. A precise assessment of supplier concentration requires more evidence, but supplier qualification, alternative sources, and validation lead times should be planned alongside the optical engine roadmap.

Software, Data, and People Determine Whether Equipment Becomes a Stable Production Line

ficonTEC concluded by returning to software. When machines use different operating conventions, processes developed by R&D engineers become harder to transfer, and production staff require additional training. A common platform provides more than compatible hardware modules: it also provides consistent approaches to alignment, vision, handling, measurement, and recipe management.

Published functions of its Process Control Master, or PCM, platform include process sequencing, recipe management, machine vision, instrument interfaces, and component tracking. A Revision Control Server, or RCS, can synchronize process parameters across multiple lines. Centralized version and parameter management reduces machine-by-machine adjustment, although new recipes still require validation before broader deployment.

The speaker also described a gradual shift from an engineering-oriented interface toward one better suited to production operators, allowing them to use preconfigured functions. This can lower the barrier to routine operation. Engineering teams still need to understand the underlying process principles to resolve abnormalities. More comprehensive automation increases the need for clear status displays, fault diagnosis, and training procedures.

For AI applications, ficonTEC’s ficonEDGE uses equipment and process data to analyze abnormalities, issue alerts, and support process adjustment and predictive maintenance. Signals mentioned at the seminar, such as changes in air pressure or drift in alignment positions, are examples of the data such analysis may use. Identifying trends before a failure can help a factory convert unexpected downtime into planned maintenance.

However, data models depend on reliable measurements, clearly defined equipment states, and actual failure records. Product changes, new material lots, or fixture adjustments can shift the original data distribution. AI effectiveness should be measured through downtime reduction, acceptable false-alarm rates, sustained yield, and reduced maintenance burden. For a photonics production line, these measurable outcomes matter more than simply adding an AI feature.

The next step emerging from the seminar is to connect different specialties within a verifiable manufacturing flow. Designers must deliver photonic circuits that can be manufactured and tested. Component suppliers must provide stable interfaces. Equipment providers must sustain precision and cycle times. Packaging and test providers must establish traceability and yield control. System manufacturers must feed thermal, servicing, and cost requirements back into earlier stages. By extending its existing semiconductor and electronics manufacturing capabilities to these interfaces, Taiwan can establish a more complete role in AI optical interconnects.

The milestones to watch are concrete manufacturing results: whether yields remain consistent across lots, whether critical stations can sustain higher throughput, whether cleaning and trimming complete product qualification, whether fiber assembly can be automated, and how long process transfer takes after equipment changes. As these questions gain repeatable answers, photonics can move beyond performance demonstrations on an exhibition floor and become a supply capability that AI infrastructure can depend on over the long term.

From Innovation to Industrialization: Scaling Taiwan’s Silicon Photonics Ecosystem

The key message from the ficonTEC Expert Seminar Asia 2026 is clear: AI is scaling faster than testing capabilities, and photonics must now achieve the manufacturing scale, reliability, and cost efficiency expected of the semiconductor industry.

As Co-Packaged Optics and Linear Pluggable Optics move toward broader adoption, the industry must address challenges extending beyond individual optical components. Testing and manufacturing solutions must evolve alongside products—from wafer and die to module and system levels—while ensuring correlation, traceability, and consistent performance throughout the production process.

No single company can solve these challenges alone. Successful industrialization requires deeper collaboration among silicon photonics foundries, optical component suppliers, advanced packaging providers, equipment manufacturers, and system integrators.

This is where ficonTEC aims to play a critical role as an ecosystem enabler, connecting different parts of the value chain through automated photonic assembly, precision alignment, and scalable testing solutions. By bringing together industry partners in Taiwan, ficonTEC is helping bridge the gap between photonics innovation and high-volume manufacturing.

Ultimately, the next competitive advantage in silicon photonics will not come from optical performance alone, but from the ability to manufacture, assemble, test, and scale photonic systems economically and reliably.

The next challenge is scale—and meeting that challenge will require an integrated ecosystem, not just individual technology breakthroughs.

As the semiconductor industry focuses on NVIDIA GPUs, high-bandwidth memory (HBM), CoWoS, and advanced process nodes, a Japanese company historically known for its food and seasoning business is playing an increasingly critical role in the AI semiconductor supply chain.

That company is Ajinomoto.

At IMPACT–IAAC 2026, Dr. Habib Hichri, Executive Vice President and Senior Fellow at Ajinomoto Fine Techno USA Corporation, delivered a presentation titled “Ajinomoto’s Material Innovations Addressing Signal Integrity and Power Management in Advanced Semiconductor Packaging for AI Driven World.”

The presentation highlighted advances in Ajinomoto Build-up Film (ABF), including glass-cloth-reinforced dielectric materials, nano-filler technologies for ultra-fine redistribution layers, plasma-etched microvias, integrated magnetic materials for power delivery, and new encapsulation films for embedded components.

Together, these developments reveal a significant industry transition.

ABF is evolving from a conventional insulating material for semiconductor package substrates into a critical technology platform that influences signal integrity, power delivery, mechanical reliability, and next-generation packaging architectures.

However, beyond the technology demonstrations, another important issue emerged toward the end of the presentation: ABF supply is becoming increasingly constrained as AI-related demand continues to accelerate.

For the semiconductor industry, the implication is clear. The next bottleneck in AI hardware scaling may not come exclusively from GPU manufacturing, HBM availability, or advanced packaging capacity. It may also emerge from the specialized materials required to connect everything together.

WaferChem (晶化科技) is a Taiwanese semiconductor materials company specializing in advanced packaging films and IC substrate materials. The company has independently developed Taiwan Build-Up Film (TBF), a locally manufactured alternative to Ajinomoto Build-up Film (ABF), used as an insulating dielectric layer in high-density IC substrates. Its technology focuses on low CTE, low dielectric loss (Df), and low dielectric constant (Dk) to support next-generation high-performance computing and advanced packaging applications. With its in-house R&D and manufacturing capabilities, WaferChem aims to reduce dependence on Japanese suppliers, strengthen Taiwan’s semiconductor materials supply chain, and provide greater supply flexibility for global substrate manufacturers.

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How Ranovus CEO Hamid Arabzadeh sees an opportunity to transform Canada’s semiconductor talent, optical technologies, and entrepreneurial experience into a new generation of globally competitive companies.

Canada has never lacked the talent to compete in the global semiconductor industry. Its universities produce world-class researchers, its engineers have helped build some of the most sophisticated communications networks in history, and its technology companies continue to contribute to breakthroughs in photonics, artificial intelligence, and advanced computing.

Yet one important question remains: How can Canada turn this extraordinary innovation capacity into a sustainable pipeline of globally competitive semiconductor companies?

At a recent Canadian semiconductor industry gathering, Hamid Arabzadeh, founder and CEO of Ranovus, offered a perspective shaped by decades of experience in optical communications, entrepreneurship, and global technology commercialization.

His message was both realistic and optimistic.

Canada already possesses many of the ingredients required for success. What it needs is a more effective way to bring those ingredients together.

The opportunity is particularly significant today because artificial intelligence is transforming not only semiconductor technology, but also the relationships between chip designers, system architects, manufacturers, investors, and customers.

For Canada, this transformation could open the door to an entirely new chapter of industrial growth.

AI Is Bringing System-Level Innovation Back to the Center

Arabzadeh began by discussing the technological opportunity driving Ranovus: the growing importance of optical interconnects in AI computing infrastructure.

For years, advances in semiconductor performance were largely associated with more powerful processors and improvements in transistor technology. Today, however, the challenge has become increasingly systemic.

AI performance depends not only on computing capability, but also on how efficiently processors exchange information with memory and with one another.

As AI clusters grow to hundreds or thousands of accelerators, communication bandwidth, latency, power consumption, and interconnect density become critical constraints.

This is where optical technology can play a transformative role.

Ranovus has developed highly integrated optical engines designed to bring high-bandwidth optical connectivity closer to AI processors.

At the October 2026 Open Compute Project Global Summit, the company showcased the flexibility of its ODIN electro-photonic platform, including 6.4 Tbps near-packaged optical technology and a 12.8 Tbps pluggable optical form factor.

The broader significance extends beyond higher transmission speeds. By shortening high-speed electrical paths and enabling dense optical connectivity, these technologies offer a pathway toward more efficient and scalable AI systems.

Ranovus is also participating in a collaboration with Cerebras Systems under a DARPA-supported program to develop wafer-scale computing technology incorporating co-packaged optics.

Defense Advanced Research Projects Agency (DARPA) selects Cerebras to build the world’s first wafer-scale photonic supercomputer—enabling previously unattainable defense and commercial applications.

This revolutionary partnership with RANOVUS Inc. will create a system to solve for two of AI and HPC’s biggest bottlenecks: memory bandwidth and communication speed.

The initiative addresses one of AI computing’s most fundamental challenges: processing capability can grow faster than the communication infrastructure needed to support it.

Although these advanced architectures still face substantial engineering and commercialization challenges, the direction is clear.

The next generation of AI infrastructure will increasingly depend on the co-design of computing, memory, interconnects, packaging, and systems.

For Arabzadeh, this represents the return of a capability Canada understands particularly well: system-level engineering.

Companies such as Nortel helped establish Canada’s expertise in building highly integrated communications systems. That accumulated knowledge remains relevant today, even as the industry moves from telecommunications networks toward AI computing infrastructure.

The technologies are different, but the underlying challenge is familiar: bringing complex components together into reliable, scalable, commercially deployable systems.

Canada has done this before. AI offers an opportunity to do it again.

Canada’s Greatest Asset May Be Hidden in Plain Sight

One of Arabzadeh’s most encouraging observations concerned Canada’s existing semiconductor and systems engineering workforce.

According to his estimate, approximately 85% to 90% of the country’s talent in these fields works within multinational technology companies.

Organizations such as Ciena, Ericsson, Nokia, and Lumentum maintain substantial engineering expertise in Canada.

At first glance, this concentration could be viewed as a challenge for domestic entrepreneurship. Much of the country’s technical capability resides within companies headquartered elsewhere.

Arabzadeh, however, sees something more promising.

These multinational organizations have helped preserve Canada’s engineering talent and maintain its connection to global technology development.

Without their presence, many experienced engineers and executives might have moved abroad.

Instead, Canada retains a remarkable reservoir of knowledge in optical networking, semiconductor design, system architecture, product development, and global customer engagement.

The next opportunity is to mobilize some of that experience into Canadian-owned technology ventures.

This is particularly relevant as a generation of experienced semiconductor and telecommunications executives approaches retirement.

Many of these individuals have participated in developing products from initial concepts through qualification, manufacturing, and worldwide deployment. They understand the commercial relationships, technical compromises, and operational decisions required to build successful technology businesses.

Their experience could be an extraordinary resource for the next generation of entrepreneurs.

Rather than viewing retirement as the end of a professional career, Canada could encourage experienced technology leaders to become founders, investors, mentors, board members, and strategic partners.

The talent already exists. The next step is to create more opportunities for that talent to build.

The Missing Link Is Not Early-Stage Innovation, but Scaling

Canada has made meaningful progress in supporting research and early-stage entrepreneurship.

Institutions including BDC, EDC, CMC Microsystems, and initiatives such as FABrIC contribute valuable resources to the semiconductor ecosystem.

However, Arabzadeh believes the country’s most significant financing challenge emerges after a company has demonstrated that its technology works.

Early-stage venture capital can support engineering teams, prototypes, and initial customer validation.

The real test arrives when a company must establish manufacturing capacity, qualify suppliers, expand production, and meet the requirements of global customers.

In semiconductors, this transition can demand substantial financial commitments before revenue reaches its full potential.

Traditional investors often seek firm orders, predictable cash flows, and established commercial traction before committing large amounts of capital.

But building those capabilities may be precisely why the company needs investment.

This creates a difficult gap between promising technology and industrial scale.

Arabzadeh argues that investors must develop a deeper understanding of the semiconductor commercialization cycle.

A successful early-stage investment is valuable, but the ability to support a company through manufacturing scale-up requires something more: long-term conviction, operational understanding, and access to global commercial networks.

He also points to Canada’s large institutional investors and pension funds as a potential source of opportunity.

As AI drives increased attention toward companies such as Broadcom and Marvell, institutional investors are developing a stronger understanding of semiconductor business models and technology roadmaps.

This growing financial literacy is a positive development.

The next step would be to translate some of that expertise into greater participation in Canadian semiconductor growth companies.

Not every technology venture will succeed, and investment discipline remains essential. But the availability of informed, patient capital could make a meaningful difference to companies capable of reaching global markets.

https://maps.app.goo.gl/AQbU21BEqAgqJCV77

One more highlight of the event was its beautiful venue, Brookstreet Hotel in Ottawa’s Kanata area. The hotel is absolutely stunning, especially at this time of year. The surrounding golf course, peaceful ponds, and vibrant golden and orange maple leaves create a breathtaking autumn landscape. Fall is truly one of the best seasons to visit Canada, and this beautiful setting made the event even more memorable. A perfect combination of great industry discussions and spectacular Canadian scenery!

Located in Ottawa, Kanata North Technology Park is Canada’s largest technology park and one of the country’s most important innovation hubs. Home to more than 800 companies, the ecosystem brings together global technology leaders such as Nokia, Ericsson, Ciena, and Mitel, alongside innovative startups.

The park has strong expertise in semiconductors, photonics, telecommunications, AI, and cybersecurity. With decades of engineering experience and close collaboration between industry and universities, Kanata North represents an important foundation for Canada’s next generation of technology companies.

Walking past the impressive “Innovators of Kanata North” wall was a great reminder of how much technological talent and innovation are concentrated in this region.

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How NVIDIA’s GTC Berlin announcements reveal a fundamental shift in AI infrastructure bottlenecks, from GPU production to advanced packaging, silicon photonics, and deployment speed.

The AI Boom Is Entering a New Phase: Capacity Is the Constraint

At GTC Berlin 2026, NVIDIA delivered one of its most significant supply chain announcements of the year.

Rather than focusing exclusively on GPU performance, NVIDIA outlined an aggressive expansion across multiple semiconductor manufacturing segments: package substrates, advanced packaging, semiconductor testing, and silicon photonics.

The numbers are extraordinary.

NVIDIA plans to increase substrate capacity by 2.5 times over the next three years. Amkor is targeting more than 300% growth in interposer wafer capacity by the end of 2028. Meanwhile, Siliconware Precision Industries (SPIL) aims to expand optical-engine manufacturing capacity by 15 times by mid-2027, followed by another doubling by the end of 2028.

NVIDIA is also providing $1.1 billion in capacity reservation financing to King Yuan Electronics (KYEC) to support semiconductor testing expansion in the United States.

These announcements reveal an important transition in the AI infrastructure industry.

The biggest challenge is no longer simply designing faster AI chips. It is building an entire industrial ecosystem capable of manufacturing, testing, packaging, connecting, and deploying those chips at unprecedented scale.

For semiconductor investors and supply chain participants, the implications extend far beyond NVIDIA itself.

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From Nortel’s semiconductor legacy to advanced InP lasers, coherent optics, and a new commercial future, the Canadian Photonics Fabrication Centre is positioning itself within one of the most important supply chains of the AI infrastructure boom.

As artificial intelligence continues to reshape the semiconductor industry, much of the attention has focused on GPUs, high-bandwidth memory, advanced packaging, and silicon photonics. Yet behind the development of faster optical interconnects lies another critical technology: III–V compound semiconductor manufacturing.

During our recent visit to the Canadian Photonics Fabrication Centre (CPFC) in Ottawa, Canada, SemiVision had the opportunity to explore a semiconductor foundry that plays an important role in this specialized industry.

Operated by the National Research Council of Canada (NRC), CPFC provides customized manufacturing services for indium phosphide (InP), gallium arsenide (GaAs), and other compound semiconductor technologies.

Its capabilities support lasers, semiconductor optical amplifiers (SOAs), coherent optical components, and photonic integrated circuits (PICs) used in telecommunications, sensing, and increasingly, AI infrastructure.

What makes CPFC particularly interesting is not simply its manufacturing equipment. It is the combination of decades of process knowledge, customized fabrication capabilities, and deep experience in translating complex photonic designs into manufacturable devices.

And now, as Canada prepares to transition CPFC into a commercial entity, the facility is entering a potentially transformative chapter.

From Nortel’s Legacy to a Specialized Photonics Foundry

CPFC’s history is closely connected to Canada’s telecommunications industry.

During our visit, the management team explained how the facility emerged from the semiconductor manufacturing expertise developed around Nortel Networks.

As Nortel’s semiconductor operations were dismantled, the NRC acquired manufacturing assets and recruited experienced engineers who had spent years developing III–V semiconductor technologies.

This industrial experience became the foundation of CPFC.

Initially, the facility supported a broad range of photonics research, including silicon photonics. However, the team gradually recognized a more pressing industry need: a specialized foundry capable of producing customized compound semiconductor devices.

Unlike conventional CMOS manufacturing, III–V photonics frequently requires highly specialized material structures, multiple epitaxial growth cycles, and complex process integration.

Today, CPFC operates a facility of approximately 40,000 square feet, including 11,000 square feet of Class 100 and Class 1000 cleanroom space.

Management described an organization of approximately 100 people, including around 85 operational personnel.

Despite its relatively modest scale compared with major semiconductor foundries, CPFC has accumulated substantial manufacturing expertise and supports commercial customers worldwide.

Its role is not to compete with TSMC in advanced logic nodes. Instead, CPFC concentrates on the specialized optical semiconductor technologies that enable high-performance communication systems.

Why III–V Semiconductors Remain Essential in the Silicon Photonics Era

Silicon photonics has emerged as a promising platform for next-generation optical interconnects, particularly as the industry moves toward co-packaged optics (CPO) and increasingly integrated optical engines.

However, silicon has an important limitation: its indirect bandgap makes efficient light generation difficult.

Consequently, III–V compound semiconductors remain essential for many high-performance optical sources and amplifiers.

CPFC focuses primarily on three material families.

• Indium Phosphide (InP) is central to its manufacturing business, particularly for lasers, SOAs, coherent communications, and integrated optical components operating in telecommunications wavelength bands.

• Gallium Arsenide (GaAs) supports applications such as rangefinding, LiDAR, imaging, and specialized sensors.

• Gallium Nitride (GaN) is another area of activity, including semiconductor processing for electronic devices and microLED applications. CPFC noted that it can process GaN structures, although GaN epitaxial growth is not currently one of its core in-house offerings.

During the visit, the team emphasized that a substantial portion of current customer demand is associated with optical communications.

These applications include pluggable transceivers, optical switching, coherent communications, and technologies relevant to CPO.

For SemiVision, this illustrates an important industry relationship:

The expansion of silicon photonics does not eliminate the importance of III–V semiconductors. In many architectures, it increases the need for reliable, high-performance III–V optical devices.

A Different Foundry Model: Manufacturing Without a Standardized PDK

Perhaps the most distinctive aspect of CPFC is its manufacturing philosophy.

Many semiconductor foundries rely on standardized process platforms and Process Design Kits (PDKs). Customers design circuits around established device libraries and manufacturing rules.

CPFC takes a different approach.

Rather than requiring every customer to adopt a fixed process, the facility builds customized manufacturing flows around individual device requirements.

According to CPFC, its intellectual property library contains more than 4,000 process steps, organized into reusable manufacturing blocks.

Engineers combine these process blocks to create customized fabrication sequences for different device architectures.

Some particularly complex photonic products may require approximately 800 manufacturing steps, seven epitaxial regrowth operations, and more than 25 mask levels.

These are examples of demanding customer designs rather than standard requirements for every product.

Importantly, customers generally retain ownership of their device designs, including epitaxial structures and layout intellectual property. CPFC contributes the manufacturing know-how required to implement those designs.

Although the facility does not generally operate around a standardized PDK, customers still need to comply with manufacturing constraints and process-specific design rules.

This arrangement allows customers to develop differentiated optical products without being restricted to a predefined component library.

The trade-off is that each customized process requires careful engineering, qualification, and yield optimization.

For emerging optical technologies, however, this flexibility can be extremely valuable.

The Importance of Epitaxial Regrowth

One of CPFC’s strongest technical capabilities is epitaxial regrowth.

In complex InP photonic devices, the active laser region and passive optical waveguide may require different semiconductor structures.

Integrating these functions on the same chip can involve multiple cycles of material growth, lithography, etching, and regrowth.

Each additional growth cycle introduces manufacturing challenges involving interface quality, contamination control, dimensional accuracy, and material uniformity.

CPFC has developed extensive expertise in managing these processes.

An important advantage is that epitaxial growth and wafer fabrication are integrated within the same manufacturing operation and tracked using a customized Manufacturing Execution System (MES).

This enables engineers to coordinate complex process sequences while maintaining material traceability.

The facility supports MOCVD, MBE, and CBE epitaxial growth capabilities alongside lithography, plasma etching, metallization, thinning, facet processing, and device testing.

Its quality control infrastructure also includes techniques such as SIMS, XPS, TEM, AFM, XRD, and focused-ion-beam analysis.

These capabilities allow engineers to identify material defects, investigate process variation, and improve manufacturing reliability.

In photonics, such process expertise can be just as important as the original device architecture.

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The next major transformation in AI server PCBs may go beyond the transition to M9 and M10 materials. As the industry explores glass-free dielectric structures using PTFE and inorganic fillers, the implications extend far beyond electrical performance. From precision drilling and copper adhesion to high-temperature lamination and dimensional stability, this materials transition could reshape the entire PCB manufacturing ecosystem.

Introduction: From Low-Loss Materials to Manufacturing Innovation

At TPCA Show 2026, one particularly interesting development is emerging in the evolution of high-performance PCB materials.

Taiwanese precision drilling specialist Topoint Technology is showcasing advanced drilling solutions for ABF/FC substrates, quartz-glass-reinforced M9 materials, M10 materials, and high-frequency PTFE laminates.

Its technology demonstrations cover drill geometry, chip evacuation, tool coatings, and hole-wall quality optimization. The company is also presenting micro-drilling capabilities involving 0.10 mm and 0.15 mm hole diameters and aspect ratios exceeding 40:1, although these specifications should not be interpreted as universally achievable across all PTFE materials.

The broader significance extends beyond drilling technology.

As AI server interconnects advance toward 112G, 224G, and potentially higher-speed architectures, PCB manufacturers are confronting increasingly demanding signal-integrity requirements.

Historically, improvements in high-speed PCB performance have largely depended on lower-loss resins, advanced glass fabrics, and smoother copper foils.

However, a different materials strategy is gaining attention: removing woven glass fabric altogether and replacing its structural and dielectric functions with carefully engineered inorganic fillers dispersed within a PTFE matrix.

This approach raises several important questions.

Why remove glass fabric when it has been an essential reinforcing material in PCBs for decades? Can ceramic fillers provide comparable dimensional stability? What happens to drilling performance when a soft polymer is combined with abrasive ceramic particles? And why might PTFE require new manufacturing equipment rather than simply replacing existing laminate materials?

Most importantly, what opportunities could this transformation create for Taiwan’s PCB materials and equipment supply chain?

Why Are High-Speed AI PCBs Considering Glass-Free Structures?

Traditional copper-clad laminates (CCLs) generally consist of resin, woven glass fabric, and copper foil.

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As artificial intelligence computing requirements continue to accelerate, the semiconductor industry is undergoing a structural transformation driven by chip architecture, advanced packaging, and materials innovation. Historically, semiconductor performance improvements were primarily achieved through advanced process-node scaling, higher transistor density, increased operating frequencies, and reduced power consumption. However, as AI accelerators increasingly adopt chiplet architectures, high-bandwidth memory (HBM), and large-scale heterogeneous integration, system performance is no longer determined solely by the silicon die.

At the 2026 IMPACT-IAAC conference, Kinsus Interconnect Technology presented its perspective on how the AI ecosystem is redefining IC substrate requirements and creating new challenges across materials, equipment, manufacturing processes, and supply chains.

One of the presentation’s central messages was that IC substrates are transitioning from traditional passive carriers into active system interconnect hubs that directly influence overall AI system performance.

Historically, IC substrates primarily provided mechanical support, signal fan-out, and electrical connections. Substrate manufacturers typically became involved after chip designs were finalized, producing substrates according to predetermined packaging specifications.

However, heterogeneous integration has fundamentally changed these requirements.

Modern AI packages must accommodate multiple chiplets, HBM stacks, high-density interconnects, and increasingly sophisticated power delivery networks. Consequently, substrates must simultaneously support high-speed signal transmission, power distribution, thermal stress management, and complex interconnection architectures.

As AI accelerator power consumption approaches or exceeds the kilowatt level, substrates have become essential components of the power delivery network (PDN). Conductor thickness, power-plane design, dielectric properties, and interconnect distribution directly affect voltage drop, power noise, and system stability.

This transformation is also fundamentally changing the role of substrate manufacturers.

Rather than participating only during the final packaging design stage, substrate suppliers must now engage much earlier in the chip architecture definition process, collaborating with foundries, IC design companies, packaging providers, and system manufacturers.

This early engagement model requires substrate manufacturing capabilities to be incorporated into architectural decisions rather than evaluated only during production preparation.

As a result, future competition among substrate manufacturers will increasingly depend on their ability to integrate materials engineering, structural design, electrical performance, and advanced manufacturing technologies—not merely production capacity and cost competitiveness.

• AI Chip Substrates Are Evolving from Passive Carriers into Critical Enablers of System Performance

• AI Chip Scaling Is Driving Simultaneous Increases in Substrate Size and Layer Count

• TSMC CoWoS Technology Evolution Is Accelerating Substrate Specification Upgrades

• Thick-Core Structures and Low-CTE Materials Are Becoming Essential for Large Substrates

• High-Speed Transmission Is Driving Low-Df Dielectrics and Low-Profile Copper Innovation

• Embedded Passive Devices and Multilayer Cores Are Transforming Substrate Architecture

• Manufacturing Yield Is Becoming a Critical Constraint on AI Substrate Capacity Expansion

• Exposure, Drilling, and Plating Equipment Are Emerging as Manufacturing Bottlenecks

• Simultaneous Growth in ABF and BT Substrate Demand Is Creating Structural Supply Chain Pressure

• Glass Cores and Ceramic Materials Are Emerging as Next-Generation Substrate Technologies

• AI Substrate Competition Is Shifting from Capacity Expansion Toward Supply Chain Integration

• Conclusion: AI Substrates Are Becoming One of the Most Critical Technology Bottlenecks in Advanced Packaging

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From superconducting qubits and quantum photonics to semiconductor fabrication and startup commercialization, a closer look at how Waterloo is building the foundations of the quantum industry.

A Quote from Stephen Hawking That Captures Waterloo’s Ambition

During our recent visit to the Institute for Quantum Computing (IQC) at the University of Waterloo in Canada, one particular quote displayed prominently inside the research building caught our attention:

“What’s happening here in Waterloo is truly special, from theory to experiment and beyond.”

— Stephen Hawking

The quote carries particular significance because Hawking personally attended the opening of the Mike & Ophelia Lazaridis Quantum-Nano Centre in September 2012.

Waterloo remembers Stephen Hawking / 2018

World renowned theoretical physicist dies at the age of 76.

More than a decade later, his observation remains an appropriate description of what Waterloo is trying to accomplish: connecting fundamental quantum physics with experimental research, engineering capabilities, and ultimately commercial applications.

For SemiVision, which closely follows semiconductor manufacturing, advanced packaging, silicon photonics, and emerging computing architectures, the visit provided an opportunity to understand how quantum technology is evolving beyond academic laboratories.

What impressed us was not simply the scientific ambition of IQC, but the broader ecosystem supporting it: multidisciplinary researchers, shared fabrication infrastructure, industry collaboration, startup incubation, and an unusually entrepreneurial intellectual property policy.

Together, these elements offer an interesting model for how a research-intensive region can develop an emerging technology industry.

IQC at a Glance: Nearly 25 Years of Quantum Research

Founded in 2002, the Institute for Quantum Computing (IQC) is approaching its 25th anniversary in 2027.

During our visit, IQC representatives described an organization with nearly 400 people, including more than 200 graduate students and approximately 30 faculty members or research groups.

Researchers are drawn from seven academic departments spanning physics, chemistry, electrical engineering, computer science, applied mathematics, pure mathematics, and combinatorics and optimization.

Unlike research organizations focused exclusively on quantum computers, IQC covers a broad range of quantum information science, including quantum computing, communication, sensing, devices, and materials.

Its central research question is deceptively simple:

How can we use physical systems governed by quantum mechanics—such as electrons, photons, and atoms—to encode, transmit, and process information in fundamentally new ways?

Answering that question requires expertise across several scientific and engineering disciplines.

IQC’s organizational structure is deliberately designed to encourage those disciplines to interact rather than operate independently.

Four Quantum Computing Platforms Under One Roof

One of the most interesting aspects of IQC is its technology-neutral research strategy.

Rather than committing exclusively to one quantum computing architecture, the institute investigates four major physical platforms.

These platforms have different strengths, limitations, and potential commercialization paths.

The research challenge is not merely to increase the number of physical qubits. It is also to improve gate fidelity, error correction, system stability, interconnects, and the overall usefulness of quantum computation.

IQC’s approach is particularly interesting because it connects the different layers of quantum computing research.

At one end, theoretical researchers investigate computational complexity and quantum algorithms. At the other, experimental groups fabricate devices and study physical limitations.

Between those layers are quantum compilers, control methods, error correction, and architecture research.

Importantly, IQC does not aim to compete directly with companies such as IBM or Google by manufacturing complete commercial quantum computing systems.

Instead, its researchers focus on scientific and engineering bottlenecks that may become critical one, two, or even three technology generations into the future.

This division of labor allows academic institutions to explore higher-risk research questions while commercial companies concentrate on product engineering and deployment.

Inside the Quantum NanoFab: A Building Within a Building

One of the most memorable parts of our visit was learning about the Quantum-Nano Fabrication and Characterization Facility (QNFCF).

The facility is physically separated from the surrounding building through an independent foundation.

The reason is straightforward: nanofabrication and quantum experiments can be extremely sensitive to environmental disturbances.

Mechanical vibrations, temperature fluctuations, and electromagnetic interference can affect precision fabrication and measurement.

The facility’s design therefore treats environmental stability as part of the research infrastructure itself.

The displayed information describes an ISO 4, 5, and 6 cleanroom environment, corresponding to approximately 10 to 10,000 particles per cubic foot under the referenced classification.

The facility supports advanced processes such as electron-beam lithography, electron microscopy, thin-film deposition, lithography, and etching.

These capabilities are relevant to superconducting quantum circuits, quantum materials, nanoscale devices, and other experimental technologies.

During the tour, we asked about wafer sizes.

The guide indicated that six-inch, or 150 mm, silicon wafers are a common format, while various tools support other substrate types.

However, the most important distinction is that this is not a conventional semiconductor foundry.

The NanoFab is designed primarily for research, prototyping, and specialized device development—not high-volume semiconductor manufacturing.

That distinction has significant implications.

Traditional foundries prioritize process stability, yield, throughput, cost efficiency, and manufacturing repeatability.

Research-oriented facilities instead prioritize flexibility, experimentation, and rapid design iterations.

At IQC, graduate students and postdoctoral researchers are directly involved in operating fabrication equipment and producing their own devices.

Dedicated technical staff maintain equipment and provide training, but the researchers themselves perform much of the fabrication work.

This creates a direct feedback loop between device design, fabrication, measurement, and redesign.

For quantum research, where device characteristics can be extremely sensitive to materials and fabrication conditions, that close connection is particularly valuable.

Why Open-Access Fabrication Matters for Quantum Startups

An important feature of IQC’s fabrication infrastructure is its open-access model.

The facility is available not only to IQC researchers but also to other University of Waterloo departments, academic partners in Canada and internationally, and eligible startups.

This is a meaningful advantage for early-stage quantum technology companies.

Unlike software startups, hardware-focused quantum companies often require expensive laboratory infrastructure before they can validate their technology.

Electron-beam lithography systems, deposition tools, cleanrooms, cryogenic testing equipment, and specialized measurement systems can create substantial capital requirements.

Shared facilities reduce the need for every startup to duplicate these investments.

They also help researchers translate laboratory discoveries into working prototypes before raising the capital needed for dedicated facilities or larger-scale manufacturing.

For the semiconductor industry, this model resembles a shared research fabrication platform rather than a commercial foundry.

It fills an important gap between fundamental academic research and industrial manufacturing.

The long-term question is how successfully technologies developed in such environments can be transferred into more standardized and scalable manufacturing processes.

From Quantum Research to Semiconductor Manufacturing

For SemiVision readers, perhaps the most commercially relevant question is how quantum computing may eventually intersect with the existing semiconductor supply chain.

Although quantum computing architectures differ substantially, several of them rely on capabilities already familiar to semiconductor manufacturers.

These include lithography, thin-film deposition, materials characterization, precision interconnects, advanced packaging, and device testing.

However, quantum hardware also introduces requirements that are not typical of conventional CMOS production.

Superconducting quantum circuits, for example, may operate at millikelvin temperatures, creating stringent requirements for materials, thermal management, microwave interconnects, and packaging.

Quantum photonic devices face different challenges involving optical loss, single-photon manipulation, waveguide fabrication, and efficient coupling between chips and optical components.

Potential semiconductor supply-chain opportunities

These are potential industry opportunities rather than confirmed IQC procurement requirements.

A particularly important issue is manufacturing scale.

Moving from a specialized six-inch research process to an eight-inch or twelve-inch industrial platform is not necessarily straightforward.

Process transfer can introduce changes in material properties, defect density, device uniformity, and performance.

Furthermore, not every quantum architecture will require twelve-inch semiconductor manufacturing.

The optimal production model will depend on the physical platform, system architecture, and eventual market demand.

Nevertheless, the broader direction is clear: as quantum hardware matures, manufacturing engineering will become increasingly important alongside fundamental physics.

Quantum Photonics: A Natural Intersection with Silicon Photonics

Another part of our tour focused on integrated photonics.

For the semiconductor industry, this is one of the most interesting areas of quantum research because it overlaps with technologies already being developed for optical communication and advanced computing systems.

Both conventional silicon photonics and quantum photonics can rely on integrated waveguides, optical coupling structures, photonic components, and semiconductor fabrication techniques.

However, their operating requirements can differ substantially.

Classical optical communication systems typically optimize optical power, bandwidth, energy efficiency, signal integrity, and transmission distance.

Quantum photonic systems may additionally require single-photon sources, single-photon detectors, quantum interference, entanglement generation, and preservation of fragile quantum states.

This creates both opportunities and challenges for existing silicon photonics suppliers.

For example, manufacturing capabilities developed for photonic integrated circuits could potentially support certain quantum photonic devices.

Yet optical losses, packaging stability, component variability, and single-photon performance may require additional process development.

The commercial opportunity is therefore not simply to reuse existing optical transceiver technology.

It is to identify which portions of the classical photonics manufacturing ecosystem can be adapted to meet quantum-specific requirements.

For Taiwan’s silicon photonics and advanced packaging ecosystem, this could become an interesting long-term research and development direction.

Waterloo’s Unusual Approach to Quantum Talent Development

IQC also offers an interesting perspective on how universities should educate future quantum engineers.

During our discussion, we asked whether quantum computing would eventually become an independent university major, similar to electrical engineering or computer science.

The response was revealing.

IQC currently favors a model in which students develop strong foundations in traditional disciplines before adding a specialization in quantum information.

Graduate students generally receive degrees through their home departments, such as physics, mathematics, chemistry, or engineering, while completing additional quantum information requirements.

The institute’s curriculum includes core training in both quantum theory and experimental quantum technologies.

This means that experimental physicists and engineers are expected to understand quantum algorithms, while mathematics and theoretical students must also learn how physical quantum computing platforms operate.

The objective is not to turn every researcher into an expert in every discipline.

It is to ensure that researchers can communicate effectively across scientific boundaries.

IQC representatives also discussed plans for a one-year, course-based master’s program in quantum information, designed to complement its existing research-oriented graduate education.

The proposed program would provide structured quantum training without requiring the same research component as a traditional thesis-based degree.

From an industry perspective, this model makes sense.

Future quantum companies will need more than quantum physicists. They will also require electrical engineers, materials specialists, software developers, semiconductor process engineers, and system integration experts.

The quantum workforce may ultimately be built by adding quantum expertise to established engineering disciplines rather than replacing those disciplines with entirely new degrees.

An Inventor-Owned IP Policy That Encourages Startups

One of the most distinctive features of the University of Waterloo ecosystem is its approach to intellectual property.

Under its inventor-owned IP framework, researchers generally retain ownership of inventions they create, subject to applicable policies and agreements.

The university also retains certain rights for academic use.

During our visit, IQC representatives explained that researchers can choose to commercialize their inventions independently or work with the university’s commercialization support organization.

The university can provide resources and financial support under agreed commercial arrangements, but researchers are not automatically required to follow a single institutional commercialization route.

This flexibility is particularly valuable for emerging technologies.

IQC representatives noted that approximately 25 startups have emerged from the institute’s ecosystem.

Some have been founded or driven by graduate students, including individuals working in quantum photonics.

The surrounding Waterloo ecosystem also includes organizations such as Velocity, Accelerator Centre, and other business development resources.

This creates a pathway from scientific discovery to prototype development, company formation, and potential industrial commercialization.

Waterloo’s broader technology ecosystem, which includes companies such as BlackBerry’s predecessor Research In Motion and OpenText, illustrates the region’s longstanding relationship between universities, talent development, and industry.

https://uwaterloo.ca/institute-for-quantum-computing/about/quantum-startups

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As artificial intelligence computing demand continues to accelerate, the global IC packaging substrate industry is undergoing one of its most significant structural transformations in decades.

At the 2026 IMPACT International Conference, Prismark presented an industry outlook covering the global packaging substrate market, AI infrastructure investment, advanced packaging technologies, and critical material supply chains.

The analysis highlighted a fundamental shift in the industry’s growth model. Future expansion will no longer be driven primarily by higher shipment volumes. Instead, increasing package dimensions, greater interconnect density, higher substrate layer counts, and more sophisticated material requirements will become the principal drivers of market value.

According to the market projections presented during the conference, the global IC packaging substrate market is expected to reach approximately US$21.5 billion in 2026, representing 44% year-over-year growth, with the potential to exceed US$40 billion over the longer term.

Notably, substrate shipment volumes are projected to grow at a compound annual growth rate (CAGR) of only approximately 5% between 2025 and 2030. This divergence between shipment growth and market value indicates that the industry is transitioning from a volume-driven business model toward one characterized by higher average selling prices and greater technological complexity.

This transformation reflects the fundamental differences between AI semiconductor packaging and traditional consumer electronics.

Historically, PC and smartphone markets generated substantial substrate demand through high shipment volumes, while average selling prices typically declined as products matured.

In contrast, AI GPUs, custom ASICs, and high-performance computing processors require significantly larger packaging footprints, more complex interconnect structures, and increasingly stringent reliability standards.

These requirements increase both manufacturing costs and the value of individual substrates.

Consequently, the competitive advantages of substrate manufacturers will increasingly depend on their ability to manufacture large-format substrates, integrate advanced materials, maintain high production yields, and secure qualifications from leading semiconductor customers.

• Rapid Expansion in Cloud Capital Expenditure Creates a Growing Investment Gap Across the Supply Chain

• CoWoS and EMIB Accelerate Substrate Scaling, Making Manufacturing Yield a Critical Challenge

• ABF Supply Chain Bottlenecks Shift Toward Low-CTE Glass Cloth and Thick Core Materials

• PTFE and M10 Material Competition Accelerates the Evolution of High-Speed AI Switching PCBs

• Glass Core and Ceramic Core Technologies Compete to Define the Next Generation of Packaging Substrates

• CoWoS and EMIB Architectural Divergence Increases Advanced Packaging Manufacturing Complexity

• Global Substrate Manufacturers Enter a New Investment Cycle as Supply Chains Undergo Structural Realignment

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As artificial intelligence and high-performance computing (HPC) continue to expand, competition in the global semiconductor industry is shifting beyond transistor scaling toward advanced packaging and system-level integration.

Historically, semiconductor performance improvements have primarily relied on increasing transistor density and advancing process technologies. However, as AI accelerators integrate more computing dies, high-bandwidth memory (HBM), and high-speed interconnects, process-node scaling alone is becoming insufficient to meet system-level performance requirements.

The ability to integrate more semiconductor components within a single package while maintaining power delivery, signal integrity, and mechanical reliability has become a critical challenge for the next generation of semiconductor technologies.

At the 2026 IMPACT conference, Japanese advanced packaging substrate manufacturer SHINKO Electric Industries presented its technology roadmap under the theme “Advanced Semiconductor Package Substrate for AI and HPC.”

SHINKO emphasized that packaging substrates are no longer passive components responsible only for electrical connections and mechanical support. Instead, they are evolving into critical integration platforms that connect computing dies, HBM, high-speed interconnects, power delivery networks, and potentially optical I/O technologies.

This transformation is redefining the competitive landscape for IC substrate manufacturers.

Future technological differentiation will depend not only on finer line widths, smaller line spacing, and increased substrate layer counts, but also on the integration of low-coefficient-of-thermal-expansion (CTE) materials, high-stiffness cores, high-density redistribution layers (RDL), and advanced assembly technologies.

For substrate manufacturers, material selection, structural design, and package reliability are becoming increasingly important determinants of product performance and manufacturing scalability.

• AI Package Scaling Significantly Increases ABF Substrate Manufacturing Complexity

• Organic Core and Glass Core Technologies Emerge as Parallel Development Paths

• Glass-Core Experiments Demonstrate Significant Warpage Reduction, but Effective CTE Remains Structure-Dependent

• Glass Cracking and Thermal Cycling Reliability Become Critical Barriers to Commercialization

• Hybrid RDL and ABF Integration Introduce a New Manufacturing Architecture

• Advanced Packaging Supply Chains Evolve as Materials and Assembly Capabilities Gain Importance

• Industry Outlook: AI Packaging Competition Shifts Toward Integrated Materials, Structures, and Reliability Engineering

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TE is transforming the data center, driving unprecedented power demands and challenging traditional approaches to power delivery. TE enables customers to overcome these challenges with high-performance power distribution solutions engineered for efficiency, scalability, and reliability. Whether leveraging industry-standard form factors or customized architectures, customers rely on TE to power the next generation of AI infrastructure.

Empowering AI & Data Center Connectivity

Why NVIDIA Is Reinventing Pluggable Optics: The Strategic Battle Between USFP, XPO, and CPO

As AI factories grow larger, the future of optical interconnects may depend less on raw transmission efficiency than on bandwidth density, serviceability, manufacturing yield, and total system economics.

In 2025, NVIDIA made a strong push into co-packaged optics (CPO), arguing that moving optical engines closer to switching silicon could significantly reduce power consumption and improve the reliability of large-scale AI infrastructure. The industry began to anticipate a future in which conventional pluggable optical transceivers would gradually lose their relevance, with silicon photonics and advanced packaging becoming the dominant technologies for next-generation data-center connectivity.

Yet barely a year later, NVIDIA appeared to be moving in a different direction.

On October 12th, 2026, NVIDIA and Cisco jointly introduced USFP (Ultra-Dense Small Form Factor Pluggable), a new pluggable optics form factor designed to support electrical signaling at 400Gb/s per lane while dramatically increasing optical interconnect density within a module footprint comparable to today’s OSFP.

The proposed architecture supports up to 12.8Tb/s of aggregate bidirectional bandwidth, potentially delivering four times the front-panel bandwidth density of existing pluggable solutions based on 200Gb/s electrical lanes.

This raises an obvious question: If CPO represents the future of optical connectivity, why would NVIDIA invest in reinventing pluggable optics?

The answer is not necessarily that NVIDIA has lost confidence in CPO. Rather, the AI infrastructure industry is entering a new phase in which the economics of optical interconnects can no longer be evaluated solely in terms of energy consumed per transmitted bit.

Bandwidth density, serviceability, manufacturing yield, deployment flexibility, and total cost of ownership are becoming equally important.

USFP reflects NVIDIA’s effort to preserve architectural flexibility as AI networks become larger, denser, and increasingly expensive to operate.

AI Factories Are Exposing a New Networking Bottleneck

The semiconductor industry has traditionally evaluated AI infrastructure through three primary constraints: GPU computing performance, high-bandwidth memory capacity, and advanced packaging availability.

As AI model training, inference, and agentic workloads become increasingly demanding, however, another limitation is emerging: the ability to connect a growing number of computing nodes efficiently.

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Inside Canada’s world-class theoretical physics institute—and why its long-term approach to scientific discovery matters for semiconductors, AI, and quantum computing.

Introduction: What If the Next Semiconductor Revolution Begins With an Equation?

During our recent visit to the Perimeter Institute for Theoretical Physics (PI) in Waterloo, Canada, one sentence displayed prominently on the wall captured the institution’s philosophy:

“Today’s Theoretical Physics is Tomorrow’s Technology.”

For those working in semiconductors, artificial intelligence, and advanced computing, this statement carries a particularly important message.

Today’s semiconductor industry is built on discoveries in quantum mechanics made approximately a century ago. Transistors, lasers, integrated circuits, and modern computing systems all depend on physical principles that were once considered purely theoretical.

But what about the technologies of 2075, 2100, or even 2150?

That is precisely the kind of question that motivates research at Perimeter Institute.

Unlike semiconductor companies developing next-generation chips or research laboratories optimizing manufacturing processes, PI focuses on understanding the fundamental laws of the universe.

Its researchers investigate questions about quantum mechanics, spacetime, gravity, cosmology, and the mathematical foundations of physics.

Some of these discoveries may never lead directly to commercial products. Others could eventually reshape entire industries.

Our visit offered a fascinating perspective on how fundamental research is organized, funded, and translated into scientific progress—and why the semiconductor and AI industries should pay attention.

A Different Kind of Research Institution

Founded in 1999 through a C$100 million commitment from Mike Lazaridis, co-founder of BlackBerry maker Research In Motion, Perimeter Institute represents an unusual model of scientific research.

Rather than operating as a traditional university department or corporate R&D center, PI is an independent institute dedicated to theoretical physics.

Its development has been supported by a combination of private philanthropy, Canadian federal funding, Ontario provincial funding, research grants, and investment income from its endowment.

This diversified funding structure is fundamental to its mission.

During our visit, the institute explained that its researchers are not expected to demonstrate immediate commercial applications for their work.

Instead, they are encouraged to pursue scientific questions whose answers might take decades to emerge.

Consider the difference between two research objectives:

A semiconductor company might ask: How can we improve transistor performance at the next technology node?

A theoretical physicist might ask: Are our current assumptions about quantum mechanics fundamentally correct?

Both questions matter, but they operate on entirely different timescales.

The first may influence a product roadmap over the next three to five years. The second could eventually change the physical principles upon which future computing technologies are built.

PI’s institutional philosophy is designed to support the second category.

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From 100-billion-parameter on-device models and AI glasses to 6G, Qualcomm CEO Cristiano Amon’s latest interview offers a glimpse into the technological competition that could define the next five years. The real transformation may not simply be about making smartphones smarter, but about fundamentally changing how humans interact with computers.

Over the past two decades, smartphones have dominated the global consumer electronics industry. From Apple’s introduction of the iPhone to the rise of the Android ecosystem, mobile computing has revolved around a familiar concept: users interact with applications through a screen to access information, conduct transactions, and navigate the digital world.

That model, which has defined the industry for nearly twenty years, may be approaching a turning point.

In a 46-minute interview with technology journalist Alex Heath, Qualcomm CEO Cristiano Amon outlined a future in which the smartphone’s defining feature is no longer its operating system or collection of applications, but an AI agent capable of understanding user intentions and independently executing tasks.

More surprisingly, Amon revealed that several frontier AI model companies have already begun developing smartphones. Some have approached Qualcomm with an ambitious hardware requirement: by 2028, smartphones should be capable of continuously running AI models containing at least 100 billion parameters.

This is a customer-defined technical objective, not a confirmed product commitment from Qualcomm. Nevertheless, it signals a significant shift in the AI industry’s ambitions. After years of concentrating investment in cloud data centers, companies are increasingly turning their attention to the billions of personal devices that people carry every day.

From Apps to Agents: The Battle for Control of the Smartphone

For most of the smartphone era, competition has centered on operating systems, app stores, and developer ecosystems. Apple controls iOS, Google dominates Android, and third-party developers rely on these platforms to reach consumers.

AI agents could fundamentally disrupt this arrangement.

Imagine a future in which users no longer need to open airline, hotel, mapping, and payment applications individually. Instead, they simply tell their smartphones: “Arrange a three-day business trip to Tokyo next week, avoiding my existing meetings.”

An AI agent could interpret the user’s calendar, search for flights, compare hotels, organize an itinerary, and complete authorized bookings.

In this scenario, applications do not necessarily disappear. Instead, they become services operating behind the scenes, accessed and coordinated by AI agents rather than directly manipulated by users.

This represents a potential redistribution of power across the technology industry.

Historically, controlling the operating system meant controlling the primary gateway to consumers. In the future, the company providing the most trusted and capable personal AI agent may gain greater influence over how users access digital services.

Apple enjoys control over its integrated hardware and software ecosystem. Google combines Android, search, and Gemini. Meta possesses extensive social interaction data and a growing smart-glasses business. OpenAI, meanwhile, is attempting to extend its models into personal AI assistants operating across devices.

The coming competition will therefore be about more than benchmark scores.

The question will increasingly become: which AI system can reliably accomplish the most useful tasks?

Amon pointed to OpenClaw as an example of the emerging agent-based interaction model, in which AI systems can operate existing applications rather than merely respond to questions in a chatbot interface.

But the ability to operate applications does not automatically guarantee commercial success. Payment authorization, privacy protection, liability for mistakes, and cross-platform permissions will determine whether autonomous agents can achieve mass-market adoption.

The smartphone industry may shift from competing over who controls the most applications to competing over whose AI agent can execute the greatest number of trustworthy tasks.

The 100-Billion-Parameter Smartphone: Memory May Matter More Than Computing Power

One of the most revealing aspects of Amon’s interview concerned the scale of AI models that technology companies expect future smartphones to support.

Some customers want devices capable of continuously running models with at least 100 billion parameters by 2028.

This is fundamentally different from today’s smartphones, which typically activate AI capabilities for specific tasks rather than maintain large models in a persistent operating state.

If AI agents are expected to understand personal schedules, behavioral patterns, environmental conditions, and application contexts, they cannot simply begin working whenever a user presses a button.

They may need to remain available continuously, maintain relevant context, and respond to new instructions with minimal latency.

This creates three interconnected engineering challenges: computing performance, memory capacity, and energy consumption.

Consider a hypothetical dense model containing 100 billion parameters. Even with 4-bit quantization, the model weights alone would theoretically require approximately 50GB of memory, excluding KV cache, runtime overhead, and other system requirements.

More aggressive quantization, sparse architectures, mixture-of-experts models, and hierarchical memory management could reduce practical requirements. However, each approach introduces trade-offs involving accuracy, bandwidth, latency, or implementation complexity.

More importantly, smartphones cannot rely on the cooling infrastructure of a data center. Nor can they continuously consume hundreds of watts of electricity.

As a result, future mobile chip competition may increasingly move beyond theoretical NPU TOPS figures toward metrics that better reflect actual user experience.

These include sustained inference performance, energy consumed per completed task, memory efficiency, and thermal stability.

For the semiconductor supply chain, several areas could benefit:

• Memory: Higher-capacity LPDDR, low-power memory architectures, and more efficient data-access technologies.

• Advanced manufacturing: Leading-edge logic processes that improve transistor density and power efficiency.

• Packaging and thermal management: System designs that reduce data movement, manage localized hotspots, and improve sustained performance.

For Qualcomm, Micron, and TSMC, this could open another round of opportunities in premium mobile silicon.

Yet significant commercial uncertainty remains.

If memory requirements and component costs increase faster than consumers’ willingness to pay, smartphones capable of running very large models may initially remain limited to premium devices.

The more meaningful question for 2028 is therefore not whether a smartphone can demonstrate a 100-billion-parameter model.

It is how much useful AI work that smartphone can perform continuously, within acceptable limits for battery life, temperature, and cost.

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μVCSEL Is Reshaping the Future of AI Optical Interconnects

As artificial intelligence infrastructure evolves from individual GPU-based computing toward multi-chip, multi-accelerator, and rack-scale architectures, the underlying interconnect technologies are undergoing a fundamental transformation. Historically, optical communication in data centers has primarily focused on switch-to-switch connectivity, with the industry progressively transitioning from 800G to 1.6T and eventually 3.2T optical transceivers to support higher-bandwidth scale-out networks.

However, as AI systems increasingly require tighter integration among GPUs, CPUs, switching ASICs, and memory resources, conventional electrical interconnects are approaching critical limitations in signal integrity, transmission distance, power consumption, and routing density.

Consequently, optical connectivity is beginning to migrate from traditional networking equipment toward the immediate vicinity of computing ASICs, creating new opportunities for Optical I/O, Near-Packaged Optics (NPO), and Co-Packaged Optics (CPO).

Among the emerging technologies, micro-vertical-cavity surface-emitting lasers (μVCSELs) and high-density two-dimensional VCSEL arrays represent a potentially disruptive alternative to conventional silicon photonics and indium phosphide (InP)-based optical architectures.

The fundamental innovation of μVCSEL technology is not simply to increase the transmission speed of an individual laser. Instead, it seeks to achieve substantially higher aggregate bandwidth density through miniaturized optical emitters, two-dimensional arrays, advanced packaging, and massively parallel optical channels.

This architectural philosophy is commonly described as a slow-and-wide approach, in which a large number of relatively low-speed channels collectively deliver high aggregate bandwidth.

Compared with continuously increasing per-lane transmission speeds through increasingly complex modulation, equalization, and digital signal processing, a parallel μVCSEL architecture offers the potential to reduce certain circuit complexities, shorten electrical interconnect distances, and improve overall energy efficiency. Nevertheless, the actual benefits will depend on optical engine design, channel density, coupling efficiency, and end-to-end transceiver performance.

During 2026, technology demonstrations involving Lumentum, Corning, Qualcomm, and Astera Labs highlighted two complementary directions for this emerging optical ecosystem: optical die-to-die connectivity and PCIe over optical interconnects.

Together, these developments illustrate a broader industry transition in which optical communication is moving beyond conventional pluggable transceivers and becoming increasingly integrated with high-speed computing interfaces.

The strategic implication is significant: optical fibers may gradually assume a greater role in the direct interconnection of computing components that have traditionally relied on electrical signaling.

• Lumentum: Establishing 1060 nm VCSEL as a Foundation for Next-Generation Optical I/O

• Qualcomm: Extending High-Speed Die-to-Die Interfaces into Optical Connectivity

• Astera Labs: Extending PCIe Switching Architectures into the Optical Domain

• Corning: High-Density Fiber Connectivity as a Critical Enabler of μVCSEL Architectures

• From Optical D2D to Optical PCIe: An Emerging Complementary Technology Ecosystem

• μVCSEL Innovation Could Reshape Value Distribution Across the Semiconductor Supply Chain

• SemiVision Industry Perspective: μVCSEL Could Redefine the Physical Boundaries of AI Computing

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